{"id":"https://openalex.org/W2039948792","doi":"https://doi.org/10.1109/fpt.2013.6718342","title":"System-level FPGA device driver with high-level synthesis support","display_name":"System-level FPGA device driver with high-level synthesis support","publication_year":2013,"publication_date":"2013-12-01","ids":{"openalex":"https://openalex.org/W2039948792","doi":"https://doi.org/10.1109/fpt.2013.6718342","mag":"2039948792"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2013.6718342","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2013.6718342","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Field-Programmable Technology (FPT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://dr.ntu.edu.sg/bitstream/10356/81247/1/System-Level%20FPGA%20Device%20Driver%20with%20High-Level%20Synthesis%20Support.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084541921","display_name":"Kizheppatt Vipin","orcid":"https://orcid.org/0000-0002-1013-7727"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kizheppatt Vipin","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065729450","display_name":"Shanker Shreejith","orcid":"https://orcid.org/0000-0002-9717-1804"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Shanker Shreejith","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069092996","display_name":"Dulitha Gunasekera","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Dulitha Gunasekera","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032556461","display_name":"Suhaib A. Fahmy","orcid":"https://orcid.org/0000-0003-0568-5048"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Suhaib A. Fahmy","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015534628","display_name":"Nachiket Kapre","orcid":"https://orcid.org/0000-0002-2187-0406"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Nachiket Kapre","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":6.2223,"has_fulltext":true,"cited_by_count":29,"citation_normalized_percentile":{"value":0.96680445,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"128","last_page":"135"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.8729215860366821},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7643495798110962},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7596620321273804},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.737541913986206},{"id":"https://openalex.org/keywords/ethernet","display_name":"Ethernet","score":0.6012705564498901},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5173234939575195},{"id":"https://openalex.org/keywords/host","display_name":"Host (biology)","score":0.49662429094314575},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.43989983201026917},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.41937416791915894},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.36371707916259766},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25273188948631287},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.1812903881072998}],"concepts":[{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.8729215860366821},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7643495798110962},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7596620321273804},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.737541913986206},{"id":"https://openalex.org/C172173386","wikidata":"https://www.wikidata.org/wiki/Q79984","display_name":"Ethernet","level":2,"score":0.6012705564498901},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5173234939575195},{"id":"https://openalex.org/C126831891","wikidata":"https://www.wikidata.org/wiki/Q221673","display_name":"Host (biology)","level":2,"score":0.49662429094314575},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.43989983201026917},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.41937416791915894},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.36371707916259766},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25273188948631287},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.1812903881072998},{"id":"https://openalex.org/C18903297","wikidata":"https://www.wikidata.org/wiki/Q7150","display_name":"Ecology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpt.2013.6718342","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2013.6718342","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 International Conference on Field-Programmable Technology (FPT)","raw_type":"proceedings-article"},{"id":"pmh:oai:dr.ntu.edu.sg:10356/81247","is_oa":true,"landing_page_url":"http://hdl.handle.net/10220/39202","pdf_url":"https://dr.ntu.edu.sg/bitstream/10356/81247/1/System-Level%20FPGA%20Device%20Driver%20with%20High-Level%20Synthesis%20Support.pdf","source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference Paper"}],"best_oa_location":{"id":"pmh:oai:dr.ntu.edu.sg:10356/81247","is_oa":true,"landing_page_url":"http://hdl.handle.net/10220/39202","pdf_url":"https://dr.ntu.edu.sg/bitstream/10356/81247/1/System-Level%20FPGA%20Device%20Driver%20with%20High-Level%20Synthesis%20Support.pdf","source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference Paper"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":false},"content_urls":{"pdf":"https://content.openalex.org/works/W2039948792.pdf"},"referenced_works_count":14,"referenced_works":["https://openalex.org/W165160209","https://openalex.org/W1545693035","https://openalex.org/W1978507093","https://openalex.org/W2040128025","https://openalex.org/W2046607278","https://openalex.org/W2046964635","https://openalex.org/W2065987977","https://openalex.org/W2098416053","https://openalex.org/W2123495558","https://openalex.org/W2125703639","https://openalex.org/W2126948472","https://openalex.org/W2170116489","https://openalex.org/W2170786409","https://openalex.org/W6632740824"],"related_works":["https://openalex.org/W4385894176","https://openalex.org/W2347371119","https://openalex.org/W2612768808","https://openalex.org/W3131402800","https://openalex.org/W1564576805","https://openalex.org/W2913952975","https://openalex.org/W2545901417","https://openalex.org/W2624257274","https://openalex.org/W2549755772","https://openalex.org/W2099393803"],"abstract_inverted_index":{"We":[0,145],"can":[1],"exploit":[2],"the":[3,26,52,77,83,86,90,116,160,168],"standardization":[4],"of":[5,112,155,159,167,175],"communication":[6,97,107],"abstractions":[7],"provided":[8],"by":[9],"modern":[10],"high-level":[11],"synthesis":[12],"tools":[13],"like":[14],"Vivado":[15],"HLS,":[16],"Bluespec":[17],"and":[18,28,46,79,108,124,136,172],"SCORE":[19],"to":[20,41,48,63,70,94,148],"provide":[21,42,71,95],"stable":[22],"system":[23],"interfaces":[24,66],"between":[25,76],"host":[27,78],"PCIe-based":[29],"FPGA":[30,38,49,53],"accelerator":[31],"platforms.":[32],"At":[33],"a":[34,129,141],"high":[35],"level,":[36],"our":[37],"driver":[39,44,93,119],"attempts":[40],"CUDA-like":[43],"behavior,":[45],"more,":[47],"programmers.":[50],"On":[51,85],"fabric,":[54],"we":[55,88],"develop":[56],"an":[57],"AXI-compliant,":[58],"lightweight":[59],"interface":[60],"switch":[61],"coupled":[62],"multiple":[64],"physical":[65],"(PCIe,":[67],"Ethernet,":[68],"DRAM)":[69,154],"programmable,":[72],"portable":[73],"routing":[74],"capability":[75,103],"user":[80,113],"logic":[81,114,126,138],"on":[82,115,128,140],"FPGA.":[84,117],"host,":[87],"adapt":[89],"RIFFA":[91],"1.0":[92],"enhanced":[96],"APIs":[98],"along":[99],"with":[100],"bitstream":[101],"configuration":[102],"allowing":[104],"low-latency,":[105],"high-throughput":[106],"safe,":[109],"reliable":[110],"programming":[111],"Our":[118],"only":[120],"consumes":[121],"21%":[122],"BRAMs":[123,135],"14%":[125],"overhead":[127,139],"Xilinx":[130,142],"ML605":[131],"platform":[132],"or":[133],"9%":[134],"8%":[137],"V707":[143],"board.":[144],"are":[146],"able":[147],"sustain":[149],"DMA":[150],"transfer":[151],"throughput":[152],"(to":[153],"1.47GB/s":[156],"(74%":[157],"peak)":[158],"PCIe":[161],"(x4":[162],"Gen2)":[163],"bandwidth,":[164],"120.2MB/s":[165],"(96%)":[166],"Ethernet":[169],"(1G)":[170],"bandwidth":[171],"5.93GB/s":[173],"(92.5%)":[174],"DRAM":[176],"bandwidth.":[177]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":8},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":3}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}