{"id":"https://openalex.org/W2128615118","doi":"https://doi.org/10.1109/fpt.2004.1393326","title":"Switch-box design for synthesizable coarse-grain arrays for system-on-chip applications","display_name":"Switch-box design for synthesizable coarse-grain arrays for system-on-chip applications","publication_year":2005,"publication_date":"2005-03-21","ids":{"openalex":"https://openalex.org/W2128615118","doi":"https://doi.org/10.1109/fpt.2004.1393326","mag":"2128615118"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2004.1393326","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393326","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035104014","display_name":"S. Khawam","orcid":null},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"S. Khawam","raw_affiliation_strings":["School of Engineering and Electronic, University of Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"School of Engineering and Electronic, University of Edinburgh, UK","institution_ids":["https://openalex.org/I98677209"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022272531","display_name":"Tughrul Arslan","orcid":"https://orcid.org/0000-0001-8176-5803"},"institutions":[{"id":"https://openalex.org/I98677209","display_name":"University of Edinburgh","ror":"https://ror.org/01nrxwf90","country_code":"GB","type":"education","lineage":["https://openalex.org/I98677209"]},{"id":"https://openalex.org/I2799593479","display_name":"Education Scotland","ror":"https://ror.org/05yapj268","country_code":"GB","type":"government","lineage":["https://openalex.org/I2799593479","https://openalex.org/I2801269068"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"T. Arslan","raw_affiliation_strings":["Institute for system Level Integration, Livingston, UK","School of Engineering and Electronic, University of Edinburgh, UK"],"affiliations":[{"raw_affiliation_string":"Institute for system Level Integration, Livingston, UK","institution_ids":["https://openalex.org/I2799593479"]},{"raw_affiliation_string":"School of Engineering and Electronic, University of Edinburgh, UK","institution_ids":["https://openalex.org/I98677209"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5035104014"],"corresponding_institution_ids":["https://openalex.org/I98677209"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19355867,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"465","last_page":"468"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7786412239074707},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6927264332771301},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6832817792892456},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6327210664749146},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.608257532119751},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5990170240402222},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5277705192565918},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5021603107452393},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.47910693287849426},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.45980846881866455},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3427552282810211},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.057145923376083374}],"concepts":[{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7786412239074707},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6927264332771301},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6832817792892456},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6327210664749146},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.608257532119751},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5990170240402222},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5277705192565918},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5021603107452393},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.47910693287849426},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.45980846881866455},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3427552282810211},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.057145923376083374},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2004.1393326","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393326","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5099999904632568}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1554938446","https://openalex.org/W2046662879","https://openalex.org/W2109656299","https://openalex.org/W2121903852","https://openalex.org/W2124979998","https://openalex.org/W2142737439","https://openalex.org/W2144853876","https://openalex.org/W2150098004","https://openalex.org/W6676280906"],"related_works":["https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2984236338","https://openalex.org/W2070693700","https://openalex.org/W3200538824","https://openalex.org/W2097839191","https://openalex.org/W1561071093","https://openalex.org/W4230718388","https://openalex.org/W3149244010","https://openalex.org/W2047284788"],"abstract_inverted_index":{"The":[0,76],"use":[1],"of":[2,46,64,83,115],"synthesizable":[3,66],"embedded":[4],"FPGAs":[5],"in":[6,24,53,72,81,117],"a":[7],"reconfigurable":[8,43,73],"systems-on-chip":[9],"(SoC)":[10],"provides":[11],"numerous":[12],"improvements":[13,23],"to":[14,18,100,103,124],"ASIC":[15],"designs":[16,92],"due":[17],"the":[19,33,47,54,62],"added":[20],"flexibility":[21],"and":[22,35,49,87,89,107,120],"functionality.":[25],"Such":[26],"arrays":[27],"have":[28],"been":[29],"proposed":[30],"earlier":[31],"by":[32],"authors":[34],"it":[36],"was":[37],"found":[38,99],"that,":[39],"as":[40],"with":[41,111],"all":[42],"architectures,":[44],"most":[45],"power":[48,110],"area":[50,106],"consumed":[51],"is":[52],"programmable":[55],"interconnects":[56],"mesh.":[57],"This":[58],"paper":[59,77],"focuses":[60],"on":[61],"design":[63],"optimized":[65,93],"switch-boxes":[67,80],"that":[68],"can":[69],"be":[70],"used":[71],"coarse-grain":[74],"architectures.":[75],"compares":[78],"different":[79],"terms":[82],"area,":[84],"power,":[85],"delay":[86],"mutability":[88],"proposes":[90],"new":[91],"for":[94],"directional":[95],"data-flow":[96],"which":[97],"are":[98],"provide":[101],"up":[102],"47%":[104],"less":[105,109],"22%":[108],"only":[112],"an":[113],"increase":[114],"10%":[116],"routed":[118],"wirelength":[119],"delays":[121],"when":[122],"compared":[123],"existing":[125],"designs.":[126]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
