{"id":"https://openalex.org/W2101778660","doi":"https://doi.org/10.1109/fpt.2004.1393279","title":"Single-chip FPGA implementation of a cryptographic co-processor","display_name":"Single-chip FPGA implementation of a cryptographic co-processor","publication_year":2005,"publication_date":"2005-03-21","ids":{"openalex":"https://openalex.org/W2101778660","doi":"https://doi.org/10.1109/fpt.2004.1393279","mag":"2101778660"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2004.1393279","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393279","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064844452","display_name":"F. Crowe","orcid":null},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]}],"countries":["IE"],"is_corresponding":true,"raw_author_name":"F. Crowe","raw_affiliation_strings":["Department of Electrical & Electronic Engineering, University College Cork, Ireland","Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, University College Cork, Ireland","institution_ids":["https://openalex.org/I27577105"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076611738","display_name":"Alan J. Daly","orcid":"https://orcid.org/0000-0002-6760-8374"},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"A. Daly","raw_affiliation_strings":["Department of Electrical & Electronic Engineering, University College Cork, Ireland","Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, University College Cork, Ireland","institution_ids":["https://openalex.org/I27577105"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034608221","display_name":"Tim Kerins","orcid":null},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"T. Kerins","raw_affiliation_strings":["Department of Electrical & Electronic Engineering, University College Cork, Ireland","Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, University College Cork, Ireland","institution_ids":["https://openalex.org/I27577105"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020472295","display_name":"William P. Marnane","orcid":"https://orcid.org/0000-0002-5039-1498"},"institutions":[{"id":"https://openalex.org/I27577105","display_name":"University College Cork","ror":"https://ror.org/03265fv13","country_code":"IE","type":"education","lineage":["https://openalex.org/I27577105"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"W. Marnane","raw_affiliation_strings":["Department of Electrical & Electronic Engineering, University College Cork, Ireland","Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland"],"affiliations":[{"raw_affiliation_string":"Department of Electrical & Electronic Engineering, University College Cork, Ireland","institution_ids":["https://openalex.org/I27577105"]},{"raw_affiliation_string":"Dept. of Electr. & Electron. Eng., Univ. Coll., Cork, , Ireland","institution_ids":["https://openalex.org/I27577105"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5064844452"],"corresponding_institution_ids":["https://openalex.org/I27577105"],"apc_list":null,"apc_paid":null,"fwci":9.2138,"has_fulltext":false,"cited_by_count":45,"citation_normalized_percentile":{"value":0.97869032,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"279","last_page":"285"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11130","display_name":"Coding theory and cryptography","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8043657541275024},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6367352604866028},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6232185363769531},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.49136605858802795},{"id":"https://openalex.org/keywords/public-key-cryptography","display_name":"Public-key cryptography","score":0.48362910747528076},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.4817940592765808},{"id":"https://openalex.org/keywords/symmetric-key-algorithm","display_name":"Symmetric-key algorithm","score":0.4744875431060791},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.44925814867019653},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41590744256973267},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.24345868825912476},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14621993899345398}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8043657541275024},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6367352604866028},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6232185363769531},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.49136605858802795},{"id":"https://openalex.org/C203062551","wikidata":"https://www.wikidata.org/wiki/Q201339","display_name":"Public-key cryptography","level":3,"score":0.48362910747528076},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.4817940592765808},{"id":"https://openalex.org/C65302260","wikidata":"https://www.wikidata.org/wiki/Q327675","display_name":"Symmetric-key algorithm","level":4,"score":0.4744875431060791},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.44925814867019653},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41590744256973267},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.24345868825912476},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14621993899345398},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2004.1393279","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2004.1393279","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1529132699","https://openalex.org/W1580351624","https://openalex.org/W1598409309","https://openalex.org/W1600401946","https://openalex.org/W1833465714","https://openalex.org/W1921730424","https://openalex.org/W2004814164","https://openalex.org/W2102550826","https://openalex.org/W2127305108","https://openalex.org/W2128453802","https://openalex.org/W2130741436","https://openalex.org/W4237773356","https://openalex.org/W4246563487","https://openalex.org/W6631781124","https://openalex.org/W6635834524","https://openalex.org/W6638664891","https://openalex.org/W6679098064"],"related_works":["https://openalex.org/W2322947709","https://openalex.org/W4385192994","https://openalex.org/W4255237014","https://openalex.org/W4242847202","https://openalex.org/W2768869846","https://openalex.org/W2951531469","https://openalex.org/W1585813234","https://openalex.org/W2796427561","https://openalex.org/W2384237980","https://openalex.org/W3009555975"],"abstract_inverted_index":{"A":[0,39],"secure":[1],"communications":[2],"protocol":[3],"contains":[4],"a":[5,9,13,36,43,77,91,96],"symmetric":[6],"key":[7,20,24,74],"cryptosystem,":[8],"hash":[10],"algorithm":[11,48],"and":[12,19,45,73,100,113,119,139],"method":[14],"for":[15],"providing":[16],"digital":[17,71],"signatures":[18,72],"exchange":[21,75],"using":[22,76],"public":[23],"cryptography.":[25],"This":[26],"work":[27],"presents":[28],"an":[29],"implementation":[30],"of":[31,70],"these":[32],"core":[33,80],"ciphers":[34],"on":[35,90,142],"single":[37],"FPGA.":[38,115],"novel":[40],"architecture":[41],"combining":[42],"symmetric-key":[44],"message":[46],"authentication":[47],"is":[49,82,88],"proposed,":[50],"with":[51],"FIFO":[52],"memory-blocks":[53],"used":[54],"as":[55],"buffers":[56],"to":[57],"allow":[58],"them":[59],"run":[60],"in":[61],"parallel":[62],"from":[63,135],"the":[64,106,111,114,143],"same":[65],"data":[66,107],"source.":[67],"The":[68,85,116],"generation":[69],"modular":[78],"exponentiator":[79],"block":[81],"also":[83],"considered.":[84],"complete":[86],"design":[87],"implemented":[89,140],"PCI":[92],"prototyping":[93,144],"card":[94],"containing":[95],"Xilinx":[97],"Virtex-2000E":[98],"FPGA":[99],"SRAM":[101],"memory":[102,117],"banks.":[103],"To":[104],"optimise":[105],"transfer":[108],"rate":[109],"between":[110,132],"SRAMs":[112],"interface":[118],"encryption":[120],"cores":[121],"are":[122,129],"partitioned":[123],"into":[124],"separate":[125],"clock":[126],"domains.":[127],"Comparisons":[128],"then":[130],"made":[131],"theoretical":[133],"results":[134,141],"timing":[136],"analysis":[137],"reports":[138],"card.":[145]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}