{"id":"https://openalex.org/W1546936894","doi":"https://doi.org/10.1109/fpt.2003.1275781","title":"Specification and integration of software and reconfigurable hardware using Hardware Join Java","display_name":"Specification and integration of software and reconfigurable hardware using Hardware Join Java","publication_year":2004,"publication_date":"2004-06-30","ids":{"openalex":"https://openalex.org/W1546936894","doi":"https://doi.org/10.1109/fpt.2003.1275781","mag":"1546936894"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2003.1275781","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2003.1275781","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016879531","display_name":"Jens\u2010Max Hopf","orcid":"https://orcid.org/0000-0002-5790-9800"},"institutions":[{"id":"https://openalex.org/I170239107","display_name":"University of South Australia","ror":"https://ror.org/01p93h210","country_code":"AU","type":"education","lineage":["https://openalex.org/I170239107"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"J. Hopf","raw_affiliation_strings":["Advanced Computing Research Centre, University of South Australia, Mawson Lakes S.A., Australia","Adv. Comput. Res. Centre, South Australia Univ., Mawson Lakes, SA, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computing Research Centre, University of South Australia, Mawson Lakes S.A., Australia","institution_ids":["https://openalex.org/I170239107"]},{"raw_affiliation_string":"Adv. Comput. Res. Centre, South Australia Univ., Mawson Lakes, SA, Australia","institution_ids":["https://openalex.org/I170239107"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048909297","display_name":"David Kearney","orcid":null},"institutions":[{"id":"https://openalex.org/I170239107","display_name":"University of South Australia","ror":"https://ror.org/01p93h210","country_code":"AU","type":"education","lineage":["https://openalex.org/I170239107"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"D. Kearney","raw_affiliation_strings":["Advanced Computing Research Centre, University of South Australia, Mawson Lakes S.A","Adv. Comput. Res. Centre, South Australia Univ., Mawson Lakes, SA, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Computing Research Centre, University of South Australia, Mawson Lakes S.A","institution_ids":["https://openalex.org/I170239107"]},{"raw_affiliation_string":"Adv. Comput. Res. Centre, South Australia Univ., Mawson Lakes, SA, Australia","institution_ids":["https://openalex.org/I170239107"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I170239107"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"379","last_page":"382"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8403671979904175},{"id":"https://openalex.org/keywords/hardware-compatibility-list","display_name":"Hardware compatibility list","score":0.5817356705665588},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5747197270393372},{"id":"https://openalex.org/keywords/hardware-architecture","display_name":"Hardware architecture","score":0.501415491104126},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.48027777671813965},{"id":"https://openalex.org/keywords/java","display_name":"Java","score":0.4730497896671295},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46997278928756714},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.4581983685493469},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4559221863746643},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44424688816070557},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4193499982357025},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4117180109024048},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36941638588905334},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3579667806625366}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8403671979904175},{"id":"https://openalex.org/C161394538","wikidata":"https://www.wikidata.org/wiki/Q3127397","display_name":"Hardware compatibility list","level":4,"score":0.5817356705665588},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5747197270393372},{"id":"https://openalex.org/C65232700","wikidata":"https://www.wikidata.org/wiki/Q5656403","display_name":"Hardware architecture","level":3,"score":0.501415491104126},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.48027777671813965},{"id":"https://openalex.org/C548217200","wikidata":"https://www.wikidata.org/wiki/Q251","display_name":"Java","level":2,"score":0.4730497896671295},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46997278928756714},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.4581983685493469},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4559221863746643},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44424688816070557},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4193499982357025},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4117180109024048},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36941638588905334},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3579667806625366}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2003.1275781","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2003.1275781","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.6299999952316284,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320322599","display_name":"Sir Ross and Sir Keith Smith Fund","ror":"https://ror.org/00nd85a71"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W157706557","https://openalex.org/W1496439412","https://openalex.org/W1533135845","https://openalex.org/W1567080347","https://openalex.org/W2140321074","https://openalex.org/W2158583421","https://openalex.org/W4244062578","https://openalex.org/W6606411226","https://openalex.org/W6634025959","https://openalex.org/W6825444808"],"related_works":["https://openalex.org/W1492116303","https://openalex.org/W1843355381","https://openalex.org/W1986121963","https://openalex.org/W2069295582","https://openalex.org/W2531450434","https://openalex.org/W90186386","https://openalex.org/W181593118","https://openalex.org/W3012294693","https://openalex.org/W4384824787","https://openalex.org/W2075931580"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"discuss":[4],"our":[5,49],"approach":[6],"to":[7],"implementing":[8],"mixed":[9],"hardware/software":[10],"reconfigurable":[11],"systems":[12],"using":[13,97],"a":[14,26,56,67],"single":[15],"high":[16],"level":[17],"specification":[18],"language,":[19],"Hardware":[20],"Join":[21],"Java.":[22],"We":[23,42],"show":[24],"how":[25],"Java":[27,60],"superset":[28],"with":[29],"newly":[30],"introduced":[31],"hardware":[32,69],"classes":[33],"can":[34],"bridge":[35],"the":[36,64,72,83,85],"gap":[37],"between":[38,71],"software":[39,68],"and":[40,61,74,88],"hardware.":[41],"also":[43,79],"do":[44],"some":[45,90],"preliminary":[46],"benchmarking":[47],"of":[48,59],"compiler":[50],"that":[51,81],"generates":[52],"RTL":[53],"VHDL":[54],"from":[55],"restricted":[57],"subset":[58],"automatically":[62],"creates":[63],"infrastructure":[65],"for":[66,93],"interface":[70],"host":[73],"FPGA.":[75],"An":[76],"example":[77],"is":[78],"presented":[80],"demonstrates":[82],"correctness":[84],"compiler's":[86],"output":[87],"provides":[89],"performance":[91],"figures":[92],"software/hardware":[94],"applications":[95],"written":[96],"it.":[98]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}