{"id":"https://openalex.org/W1597156230","doi":"https://doi.org/10.1109/fpt.2003.1275758","title":"Source-directed transformations for hardware compilation","display_name":"Source-directed transformations for hardware compilation","publication_year":2004,"publication_date":"2004-06-30","ids":{"openalex":"https://openalex.org/W1597156230","doi":"https://doi.org/10.1109/fpt.2003.1275758","mag":"1597156230"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2003.1275758","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2003.1275758","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103260538","display_name":"Jos\u00e9 G. F. Coutinho","orcid":"https://orcid.org/0000-0003-4138-3709"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"J.G.F. Coutinho","raw_affiliation_strings":["Department of Computing, Imperial College London, London, UK","Dept. of Comput., Imperial Coll., London, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computing, Imperial College London, London, UK","institution_ids":["https://openalex.org/I47508984"]},{"raw_affiliation_string":"Dept. of Comput., Imperial Coll., London, UK","institution_ids":["https://openalex.org/I47508984"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057940557","display_name":"Wayne Luk","orcid":"https://orcid.org/0000-0002-6750-927X"},"institutions":[{"id":"https://openalex.org/I47508984","display_name":"Imperial College London","ror":"https://ror.org/041kmwe10","country_code":"GB","type":"education","lineage":["https://openalex.org/I47508984"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"W. Luk","raw_affiliation_strings":["Department of Computing, Imperial College London, London, UK","Dept. of Comput., Imperial Coll., London, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computing, Imperial College London, London, UK","institution_ids":["https://openalex.org/I47508984"]},{"raw_affiliation_string":"Dept. of Comput., Imperial Coll., London, UK","institution_ids":["https://openalex.org/I47508984"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I47508984"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"29","issue":null,"first_page":"278","last_page":"285"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7778767347335815},{"id":"https://openalex.org/keywords/maintainability","display_name":"Maintainability","score":0.6876469850540161},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5925086140632629},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5770354866981506},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4896422028541565},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.48580312728881836},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.45710620284080505},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4038439393043518},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.39540159702301025},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.3062627911567688},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.2400009036064148},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09722074866294861}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7778767347335815},{"id":"https://openalex.org/C160713754","wikidata":"https://www.wikidata.org/wiki/Q1389965","display_name":"Maintainability","level":2,"score":0.6876469850540161},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5925086140632629},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5770354866981506},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4896422028541565},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.48580312728881836},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.45710620284080505},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4038439393043518},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.39540159702301025},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.3062627911567688},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.2400009036064148},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09722074866294861},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpt.2003.1275758","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2003.1275758","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8","score":0.4300000071525574}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W2025912481","https://openalex.org/W2029779044","https://openalex.org/W2038198320","https://openalex.org/W2049890071","https://openalex.org/W2103581911","https://openalex.org/W2112432448","https://openalex.org/W2129183345","https://openalex.org/W2293225001","https://openalex.org/W6656978832"],"related_works":["https://openalex.org/W2160765347","https://openalex.org/W1784325190","https://openalex.org/W2505444316","https://openalex.org/W2372410743","https://openalex.org/W2064378805","https://openalex.org/W1920256783","https://openalex.org/W2367316285","https://openalex.org/W2068377759","https://openalex.org/W2612099726","https://openalex.org/W2160632767"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"the":[3,104,118],"Haydn-C":[4,35],"language":[5],"and":[6,24,29,49,57,99,113],"its":[7],"parallel":[8],"programming":[9],"model.":[10],"They":[11],"have":[12,61],"been":[13,88],"developed":[14],"to":[15,20,25,42,45,50,74],"support":[16],"modular":[17],"hardware":[18],"design,":[19],"improve":[21],"designer":[22],"productivity,":[23],"enhance":[26],"design":[27,47,70,80,108],"quality":[28],"maintainability.":[30],"The":[31,82],"principal":[32],"innovation":[33],"of":[34,39,84],"is":[36,109],"a":[37,67],"framework":[38],"optional":[40],"annotations":[41],"enable":[43],"users":[44],"describe":[46],"constraints,":[48],"direct":[51],"source-level":[52],"transformations":[53,64],"such":[54,63],"as":[55],"scheduling":[56],"resource":[58],"allocation.":[59],"We":[60],"automated":[62],"so":[65],"that":[66],"single":[68],"high-level":[69],"can":[71],"be":[72],"used":[73],"produce":[75],"many":[76],"implementations":[77],"with":[78],"different":[79],"trade-offs.":[81],"effectiveness":[83],"this":[85],"approach":[86],"has":[87],"evaluated":[89],"using":[90],"various":[91],"case":[92],"studies,":[93],"including":[94],"FIR":[95],"filters,":[96],"fractal":[97],"generators,":[98],"morphological":[100,106],"operators.":[101],"For":[102],"instance,":[103],"fastest":[105],"erosion":[107],"129":[110],"times":[111,115],"faster":[112],"3.4":[114],"larger":[116],"than":[117],"smallest":[119],"design.":[120]},"counts_by_year":[{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}