{"id":"https://openalex.org/W2105865767","doi":"https://doi.org/10.1109/fpt.2002.1188688","title":"Debug methods for hybrid CPU/FPGA systems","display_name":"Debug methods for hybrid CPU/FPGA systems","publication_year":2003,"publication_date":"2003-10-01","ids":{"openalex":"https://openalex.org/W2105865767","doi":"https://doi.org/10.1109/fpt.2002.1188688","mag":"2105865767"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2002.1188688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014816559","display_name":"Eric Roesler","orcid":null},"institutions":[{"id":"https://openalex.org/I100005738","display_name":"Brigham Young University","ror":"https://ror.org/047rhhm47","country_code":"US","type":"education","lineage":["https://openalex.org/I100005738"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"E. Roesler","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087430192","display_name":"Brent Nelson","orcid":"https://orcid.org/0000-0002-7523-3269"},"institutions":[{"id":"https://openalex.org/I100005738","display_name":"Brigham Young University","ror":"https://ror.org/047rhhm47","country_code":"US","type":"education","lineage":["https://openalex.org/I100005738"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"B. Nelson","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Brigham Young Univ., Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I100005738"],"apc_list":null,"apc_paid":null,"fwci":1.3947,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.80528908,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"2147","issue":null,"first_page":"243","last_page":"250"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.8981613516807556},{"id":"https://openalex.org/keywords/psoc","display_name":"PSoC","score":0.8456097841262817},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8198467493057251},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7210934162139893},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6987672448158264},{"id":"https://openalex.org/keywords/background-debug-mode-interface","display_name":"Background debug mode interface","score":0.6400676965713501},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5808619856834412},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4884904623031616},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.46987730264663696},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4398545026779175},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2755913734436035}],"concepts":[{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.8981613516807556},{"id":"https://openalex.org/C95421548","wikidata":"https://www.wikidata.org/wiki/Q1640617","display_name":"PSoC","level":3,"score":0.8456097841262817},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8198467493057251},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7210934162139893},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6987672448158264},{"id":"https://openalex.org/C124774103","wikidata":"https://www.wikidata.org/wiki/Q4839640","display_name":"Background debug mode interface","level":3,"score":0.6400676965713501},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5808619856834412},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4884904623031616},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.46987730264663696},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4398545026779175},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2755913734436035}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpt.2002.1188688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.115.8883","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.115.8883","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.byu.edu/~nelson/research/pubs/cfpt2002.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.46000000834465027,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1541457918","https://openalex.org/W1570833211","https://openalex.org/W2019954661","https://openalex.org/W2105993342","https://openalex.org/W2126253518","https://openalex.org/W2134855419","https://openalex.org/W2156253418","https://openalex.org/W2158583421","https://openalex.org/W2472445012","https://openalex.org/W4250291977","https://openalex.org/W4285719527","https://openalex.org/W6632436631","https://openalex.org/W6676052100"],"related_works":["https://openalex.org/W2361273971","https://openalex.org/W2351581202","https://openalex.org/W2978026406","https://openalex.org/W2385068581","https://openalex.org/W2381166695","https://openalex.org/W4241045879","https://openalex.org/W2366346238","https://openalex.org/W2366922255","https://openalex.org/W2387706296","https://openalex.org/W2347893649"],"abstract_inverted_index":{"The":[0],"combining":[1],"of":[2,48,57,87,103,106,131,142,168],"one":[3],"or":[4,60],"more":[5],"CPU's":[6],"and":[7,26,104,110,148,171,180],"an":[8],"FPGA":[9],"fabric":[10],"on":[11,128],"the":[12,46,49,51,54,58,61,75,80,85,101,118,132,140,161],"same":[13,119],"die":[14],"is":[15,136],"growing":[16],"in":[17,41,95,145],"popularity.":[18],"Such":[19],"programmable":[20],"system-on-chip":[21],"(PSOC)":[22],"systems":[23],"promise":[24],"performance":[25],"development":[27],"time":[28],"advantages":[29],"over":[30],"conventional":[31],"technology.":[32],"In":[33],"a":[34,70,129,165],"PSOC":[35,96,124,157],"design,":[36,59],"design":[37,47,93],"errors":[38,94],"may":[39],"occur":[40],"many":[42],"different":[43],"places":[44],"-":[45],"CPU,":[50],"embedded":[52,169],"software,":[53],"FPGA-based":[55],"parts":[56],"interfaces":[62],"between":[63],"these":[64],"various":[65],"parts.":[66],"This":[67],"paper":[68],"presents":[69],"flexible":[71],"tool":[72,135,162],"that":[73,152],"allows":[74],"user":[76],"to":[77,84,90,160,163],"dynamically":[78],"adapt":[79],"CAD":[81,134],"tool's":[82],"behavior":[83],"level":[86,112],"detail":[88],"needed":[89],"track":[91],"down":[92],"designs.":[97],"It":[98],"provides":[99],"for":[100,156],"creation":[102],"coexistence":[105],"software":[107],"source":[108],"debuggers":[109],"gate":[111],"debug":[113,143],"tools,":[114],"all":[115],"incorporated":[116],"into":[117],"debugging":[120,125],"environment.":[121],"A":[122],"prototype":[123],"system":[126],"based":[127],"derivative":[130],"JHDL":[133],"presented":[137],"which":[138],"illustrates":[139],"range":[141,167],"support":[144,164],"both":[146],"simulation":[147],"hardware":[149],"execution":[150],"modes":[151],"can":[153],"be":[154],"provided":[155],"debug.":[158],"Extensions":[159],"wider":[166],"processors":[170],"GNU":[172],"compiler":[173],"tools":[174],"are":[175],"discussed":[176],"along":[177],"with":[178],"conclusions":[179],"future":[181],"work.":[182]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}