{"id":"https://openalex.org/W1506895845","doi":"https://doi.org/10.1109/fpt.2002.1188679","title":"HIDE: a logic based hardware intelligent description environment","display_name":"HIDE: a logic based hardware intelligent description environment","publication_year":2003,"publication_date":"2003-10-01","ids":{"openalex":"https://openalex.org/W1506895845","doi":"https://doi.org/10.1109/fpt.2002.1188679","mag":"1506895845"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2002.1188679","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188679","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018835565","display_name":"S. Belkacemi","orcid":null},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"S. Belkacemi","raw_affiliation_strings":["School of Computer Science, The Queens, Queen''s University Belfast, Belfast, UK","Sch. of Comput. Sci., Queen's Univ. of Belfast, , UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science, The Queens, Queen''s University Belfast, Belfast, UK","institution_ids":["https://openalex.org/I126231945"]},{"raw_affiliation_string":"Sch. of Comput. Sci., Queen's Univ. of Belfast, , UK","institution_ids":["https://openalex.org/I126231945"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111836086","display_name":"K. Benkrid","orcid":null},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"K. Benkrid","raw_affiliation_strings":["School of Computer Science, The Queens, Queen''s University Belfast, Belfast, UK","Sch. of Comput. Sci., Queen's Univ. of Belfast, , UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science, The Queens, Queen''s University Belfast, Belfast, UK","institution_ids":["https://openalex.org/I126231945"]},{"raw_affiliation_string":"Sch. of Comput. Sci., Queen's Univ. of Belfast, , UK","institution_ids":["https://openalex.org/I126231945"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000739686","display_name":"Danny Crookes","orcid":"https://orcid.org/0000-0002-3533-6095"},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"D. Crookes","raw_affiliation_strings":["School of Computer Science, The Queens, Queen''s University Belfast, Belfast, UK","Sch. of Comput. Sci., Queen's Univ. of Belfast, , UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Computer Science, The Queens, Queen''s University Belfast, Belfast, UK","institution_ids":["https://openalex.org/I126231945"]},{"raw_affiliation_string":"Sch. of Comput. Sci., Queen's Univ. of Belfast, , UK","institution_ids":["https://openalex.org/I126231945"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I126231945"],"apc_list":null,"apc_paid":null,"fwci":0.2325,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.39681099,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"vi","issue":null,"first_page":"174","last_page":"180"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8012450933456421},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.7676862478256226},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.6234888434410095},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6159986853599548},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.6019258499145508},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.539853036403656},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5397902131080627},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5207650065422058},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4884583055973053},{"id":"https://openalex.org/keywords/semantics","display_name":"Semantics (computer science)","score":0.42481905221939087},{"id":"https://openalex.org/keywords/logic-programming","display_name":"Logic programming","score":0.4239957332611084},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4222026467323303},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3649945855140686}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8012450933456421},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.7676862478256226},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.6234888434410095},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6159986853599548},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.6019258499145508},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.539853036403656},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5397902131080627},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5207650065422058},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4884583055973053},{"id":"https://openalex.org/C184337299","wikidata":"https://www.wikidata.org/wiki/Q1437428","display_name":"Semantics (computer science)","level":2,"score":0.42481905221939087},{"id":"https://openalex.org/C128838566","wikidata":"https://www.wikidata.org/wiki/Q275603","display_name":"Logic programming","level":2,"score":0.4239957332611084},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4222026467323303},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3649945855140686}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpt.2002.1188679","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188679","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.qub.ac.uk/portal:publications/26a8c785-4765-435d-9e99-a411ea025b8e","is_oa":false,"landing_page_url":"https://pure.qub.ac.uk/en/publications/26a8c785-4765-435d-9e99-a411ea025b8e","pdf_url":null,"source":{"id":"https://openalex.org/S4306402319","display_name":"Research Portal (Queen's University Belfast)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I126231945","host_organization_name":"Queen's University Belfast","host_organization_lineage":["https://openalex.org/I126231945"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Belkacemi, S, Benkrid, K & Crookes, D 2002, 'HIDE: A logic based hardware intelligent description environment', Paper presented at IEEE International Conference on Field-Programmable Technology (FPT), New Territories, China, 01/12/2002 - 01/12/2002 pp. 174-180.","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1501488688","https://openalex.org/W1938610612","https://openalex.org/W2063406991","https://openalex.org/W2113813361","https://openalex.org/W2126255765","https://openalex.org/W2156253418","https://openalex.org/W3143708375","https://openalex.org/W4239852057","https://openalex.org/W6676958326"],"related_works":["https://openalex.org/W2136295006","https://openalex.org/W2165480138","https://openalex.org/W2107240870","https://openalex.org/W2107517480","https://openalex.org/W4231001357","https://openalex.org/W2131024837","https://openalex.org/W2063218591","https://openalex.org/W4210326786","https://openalex.org/W2117342402","https://openalex.org/W2614101859"],"abstract_inverted_index":{"This":[0],"paper":[1,88],"presents":[2,89],"a":[3,67,104],"high-level":[4],"hardware":[5,31,34,40,49],"description":[6,50],"environment":[7],"based":[8],"on":[9],"the":[10,27,90,101],"logic":[11],"programming":[12],"language":[13],"Prolog,":[14],"called":[15],"HIDE.":[16],"The":[17,87],"latter":[18],"has":[19],"been":[20],"designed":[21],"in":[22,47,80,100],"an":[23],"attempt":[24],"to":[25],"address":[26],"problem":[28],"of":[29,64,70,94,103],"abstract":[30,39],"design":[32],"and":[33,42,61,76,92,96],"efficiency.":[35],"HIDE":[36,95],"provides":[37],"more":[38],"descriptions":[41],"compositions":[43],"than":[44],"are":[45],"possible":[46],"traditional":[48],"languages":[51],"such":[52],"as":[53],"VHDL":[54],"or":[55],"Verilog.":[56],"It":[57],"enables":[58],"highly":[59],"scaleable":[60],"parameterised":[62],"composition":[63],"blocks":[65],"using":[66],"small":[68],"set":[69],"constructors":[71],"(e.g.":[72],"horizontal,":[73],"vertical":[74],"composition),":[75],"generates":[77],"pre-placed":[78],"configurations":[79],"EDIF":[81],"format":[82],"for":[83,109],"Xilinx":[84,110],"Virtex":[85,111],"FPGAs.":[86,112],"syntax":[91],"semantics":[93],"illustrates":[97],"its":[98],"use":[99],"construction":[102],"bit":[105],"parallel":[106],"multiplier":[107],"core":[108]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}