{"id":"https://openalex.org/W1579754388","doi":"https://doi.org/10.1109/fpt.2002.1188674","title":"Clustered programmable-reconfigurable processors","display_name":"Clustered programmable-reconfigurable processors","publication_year":2003,"publication_date":"2003-10-01","ids":{"openalex":"https://openalex.org/W1579754388","doi":"https://doi.org/10.1109/fpt.2002.1188674","mag":"1579754388"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2002.1188674","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188674","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073672141","display_name":"D.B. Gottlieb","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D.B. Gottlieb","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","Illinois Univ., Urbana, IL, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"Illinois Univ., Urbana, IL, , USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021065409","display_name":"Jeffrey Cook","orcid":"https://orcid.org/0000-0002-7859-4131"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.J. Cook","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","Illinois Univ., Urbana, IL, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"Illinois Univ., Urbana, IL, , USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068655004","display_name":"J.D. Walstrom","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.D. Walstrom","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","Illinois Univ., Urbana, IL, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"Illinois Univ., Urbana, IL, , USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047392855","display_name":"S. Ferrera","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Ferrera","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","Illinois Univ., Urbana, IL, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"Illinois Univ., Urbana, IL, , USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066049719","display_name":"Chi-Wei Wang","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chi-Wei Wang","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","Illinois Univ., Urbana, IL, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"Illinois Univ., Urbana, IL, , USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042656198","display_name":"N.P. Carter","orcid":null},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.P. Carter","raw_affiliation_strings":["University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","Illinois Univ., Urbana, IL, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Illinois, Urbana-Champaign, Urbana-Champaign, USA","institution_ids":["https://openalex.org/I157725225"]},{"raw_affiliation_string":"Illinois Univ., Urbana, IL, , USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":1.2241,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.82388018,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"89","issue":null,"first_page":"134","last_page":"141"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7307944893836975},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.589367687702179},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.5810277462005615},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5631224513053894},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5549380779266357},{"id":"https://openalex.org/keywords/programmable-logic-device","display_name":"Programmable logic device","score":0.5204363465309143},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5091323256492615},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5025484561920166},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5003006458282471},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4736520051956177},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4498530626296997},{"id":"https://openalex.org/keywords/limiting","display_name":"Limiting","score":0.4458009600639343},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.36928221583366394},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.32423102855682373},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.151241272687912}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7307944893836975},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.589367687702179},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.5810277462005615},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5631224513053894},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5549380779266357},{"id":"https://openalex.org/C206274596","wikidata":"https://www.wikidata.org/wiki/Q1063837","display_name":"Programmable logic device","level":2,"score":0.5204363465309143},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5091323256492615},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5025484561920166},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5003006458282471},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4736520051956177},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4498530626296997},{"id":"https://openalex.org/C188198153","wikidata":"https://www.wikidata.org/wiki/Q1613840","display_name":"Limiting","level":2,"score":0.4458009600639343},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.36928221583366394},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.32423102855682373},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.151241272687912},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpt.2002.1188674","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188674","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.111.5495","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.111.5495","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.crhc.uiuc.edu/~amalgam/publications/fpt02-gottlieb.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.550000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320337345","display_name":"Office of Naval Research","ror":"https://ror.org/00rk2pe57"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W286049110","https://openalex.org/W1501400124","https://openalex.org/W1805374096","https://openalex.org/W1972887087","https://openalex.org/W1974169079","https://openalex.org/W1975085273","https://openalex.org/W1991824795","https://openalex.org/W1994439893","https://openalex.org/W2025787141","https://openalex.org/W2030922743","https://openalex.org/W2092421293","https://openalex.org/W2102081731","https://openalex.org/W2105555051","https://openalex.org/W2107923684","https://openalex.org/W2111880608","https://openalex.org/W2148911285","https://openalex.org/W2158783087","https://openalex.org/W2165099691","https://openalex.org/W2168569016","https://openalex.org/W2171825402","https://openalex.org/W2296006986","https://openalex.org/W3004436853","https://openalex.org/W3146150975","https://openalex.org/W3149144981","https://openalex.org/W4235146393","https://openalex.org/W4236789552","https://openalex.org/W4244285675","https://openalex.org/W4248959645","https://openalex.org/W4251868814","https://openalex.org/W6610278844","https://openalex.org/W6638424597","https://openalex.org/W6675883869","https://openalex.org/W6697014116","https://openalex.org/W6793222508"],"related_works":["https://openalex.org/W2102081731","https://openalex.org/W4236258190","https://openalex.org/W3004436853","https://openalex.org/W2119690156","https://openalex.org/W2054281082","https://openalex.org/W1589728323","https://openalex.org/W1502060307","https://openalex.org/W2148708361","https://openalex.org/W2073444830","https://openalex.org/W4244658586"],"abstract_inverted_index":{"In":[0,51],"order":[1],"to":[2,7,33,111],"pose":[3],"a":[4,35,60,75,118],"successful":[5],"challenge":[6],"conventional":[8,20,67],"processor":[9,63],"architectures,":[10],"reconfigurable":[11,72],"computing":[12],"systems":[13],"must":[14],"achieve":[15],"significantly":[16],"better":[17],"performance":[18],"than":[19],"programmable":[21,120],"processors":[22,68],"by":[23,87],"both":[24],"greatly":[25],"reducing":[26],"the":[27,56,89],"number":[28],"of":[29,38,58,71,91,101],"clock":[30,43,85],"cycles":[31],"required":[32],"execute":[34],"wide":[36],"range":[37],"applications":[39,108],"and":[40,69,97],"achieving":[41],"high":[42,84],"rates":[44,86],"when":[45,109],"implemented":[46],"in":[47],"deep-submicron":[48],"fabrication":[49],"technologies.":[50],"this":[52],"paper,":[53],"we":[54],"describe":[55],"architecture":[57,80,114],"Amalgam,":[59],"clustered":[61],"programmable-reconfigurable":[62],"that":[64,115],"integrates":[65],"multiple":[66],"blocks":[70],"logic":[73],"onto":[74],"single":[76,119],"chip.":[77],"Amalgam's":[78],"distributed":[79],"allows":[81],"implementation":[82],"at":[83],"limiting":[88],"impact":[90],"wire":[92],"delay":[93],"on":[94,105],"cycle":[95],"time":[96],"delivers":[98],"an":[99,112],"average":[100],"13.7/spl":[102],"times/":[103],"speedup":[104],"our":[106],"benchmark":[107],"compared":[110],"equivalent":[113],"contains":[116],"only":[117],"processor.":[121]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}