{"id":"https://openalex.org/W1591079016","doi":"https://doi.org/10.1109/fpt.2002.1188666","title":"Resource-aware run-time elaboration of behavioural FPGA specifications","display_name":"Resource-aware run-time elaboration of behavioural FPGA specifications","publication_year":2003,"publication_date":"2003-10-01","ids":{"openalex":"https://openalex.org/W1591079016","doi":"https://doi.org/10.1109/fpt.2002.1188666","mag":"1591079016"},"language":"en","primary_location":{"id":"doi:10.1109/fpt.2002.1188666","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188666","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://handle.unsw.edu.au/1959.4/39671","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5040798175","display_name":"Usama Malik","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"U. Malik","raw_affiliation_strings":["Computer Science and Engineering, University of New South Wales, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of New South Wales, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109564702","display_name":"K. So","orcid":null},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"K. So","raw_affiliation_strings":["Computer Science and Engineering, University of New South Wales, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of New South Wales, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5084619663","display_name":"Oliver Diessel","orcid":"https://orcid.org/0000-0003-0725-5957"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"O. Diessel","raw_affiliation_strings":["Computer Science and Engineering, University of New South Wales, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Science and Engineering, University of New South Wales, Australia","institution_ids":["https://openalex.org/I31746571"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I31746571"],"apc_list":null,"apc_paid":null,"fwci":0.7811,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.68000752,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"148","issue":null,"first_page":"68","last_page":"75"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8074997663497925},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7183339595794678},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6805950403213501},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.620124340057373},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5017492771148682},{"id":"https://openalex.org/keywords/field","display_name":"Field (mathematics)","score":0.4772458076477051},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.46992623805999756},{"id":"https://openalex.org/keywords/interpreter","display_name":"Interpreter","score":0.4660179913043976},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.4655279517173767},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.42183324694633484},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.41966816782951355},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.39803346991539},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3716440498828888},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.34252429008483887},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.32354480028152466},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2258930802345276},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.09612873196601868}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8074997663497925},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7183339595794678},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6805950403213501},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.620124340057373},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5017492771148682},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.4772458076477051},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.46992623805999756},{"id":"https://openalex.org/C122783720","wikidata":"https://www.wikidata.org/wiki/Q183065","display_name":"Interpreter","level":2,"score":0.4660179913043976},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.4655279517173767},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.42183324694633484},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.41966816782951355},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.39803346991539},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3716440498828888},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.34252429008483887},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.32354480028152466},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2258930802345276},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.09612873196601868},{"id":"https://openalex.org/C202444582","wikidata":"https://www.wikidata.org/wiki/Q837863","display_name":"Pure mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/fpt.2002.1188666","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpt.2002.1188666","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:unsworks.unsw.edu.au:1959.4/39671","is_oa":true,"landing_page_url":"http://handle.unsw.edu.au/1959.4/39671","pdf_url":null,"source":{"id":"https://openalex.org/S4377196481","display_name":"UNSWorks (UNSW Sydney)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I31746571","host_organization_name":"UNSW Sydney","host_organization_lineage":["https://openalex.org/I31746571"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference Paper"},{"id":"pmh:doi:10.26190/unsworks/500","is_oa":false,"landing_page_url":"http://ieeexplore.ieee.org/servlet/opac?punumber=8456","pdf_url":null,"source":{"id":"https://openalex.org/S4406922384","display_name":"Open MIND","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"ConferencePaper"}],"best_oa_location":{"id":"pmh:oai:unsworks.unsw.edu.au:1959.4/39671","is_oa":true,"landing_page_url":"http://handle.unsw.edu.au/1959.4/39671","pdf_url":null,"source":{"id":"https://openalex.org/S4377196481","display_name":"UNSWorks (UNSW Sydney)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I31746571","host_organization_name":"UNSW Sydney","host_organization_lineage":["https://openalex.org/I31746571"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Conference Paper"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W240154444","https://openalex.org/W1578754560","https://openalex.org/W1820726733","https://openalex.org/W1901901986","https://openalex.org/W1983553168","https://openalex.org/W2049600101","https://openalex.org/W2085912345","https://openalex.org/W2097869799","https://openalex.org/W2107526733","https://openalex.org/W2140505043","https://openalex.org/W2158583421","https://openalex.org/W3144368627","https://openalex.org/W4210886820","https://openalex.org/W6676995014"],"related_works":["https://openalex.org/W2269990635","https://openalex.org/W2543290882","https://openalex.org/W2295153704","https://openalex.org/W3013057549","https://openalex.org/W1980040075","https://openalex.org/W1490270176","https://openalex.org/W1604320855","https://openalex.org/W2029518208","https://openalex.org/W282396022","https://openalex.org/W2159022270"],"abstract_inverted_index":{"The":[0,114,137],"Circal":[1,41],"process":[2],"algebra":[3],"is":[4,120],"being":[5],"used":[6],"to":[7,17,45,63,124,145],"explore":[8],"the":[9,28,40,46,69,95,102],"behavioural":[10,75],"specification":[11],"of":[12,32,97],"systems":[13],"that":[14,77,100],"are":[15,57,72,78],"mapped":[16,62],"field":[18,51],"programmable":[19,52],"logic":[20],"circuits.":[21],"In":[22,43],"this":[23,67,112],"paper":[24],"we":[25],"report":[26,93],"on":[27,94],"implementation":[29],"and":[30,61,82,106,149],"performance":[31,109],"an":[33],"interpreter":[34],"for":[35,50,111],"system":[36,68],"specifications":[37,76],"given":[38],"in":[39,54,66,129],"language.":[42],"contrast":[44],"typical":[47],"design":[48,99],"flow":[49],"technology":[53],"which":[55,144],"designs":[56],"statically":[58],"partitioned,":[59,79],"synthesised,":[60],"pre-allocated":[64],"resources,":[65],"specified":[70],"circuits":[71],"extracted":[73],"from":[74],"elaborated,":[80],"mapped,":[81],"configured":[83],"at":[84,134],"run":[85,135],"time":[86],"as":[87],"control":[88],"passes":[89],"through":[90],"them.":[91],"We":[92],"details":[96],"a":[98,121,141],"targets":[101],"Celoxica":[103],"RC1000":[104],"co-processor":[105],"assess":[107],"preliminary":[108],"results":[110,115,138],"implementation.":[113],"clearly":[116],"demonstrate":[117],"our":[118],"method":[119],"practical":[122],"approach":[123],"overcome":[125],"resource":[126],"constraints,":[127],"particularly":[128],"applications":[130],"where":[131],"these":[132],"change":[133],"time.":[136],"also":[139],"establish":[140],"benchmark":[142],"against":[143],"measure":[146],"future":[147],"improvements":[148],"alternative":[150],"methods.":[151]},"counts_by_year":[{"year":2022,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}