{"id":"https://openalex.org/W2884288768","doi":"https://doi.org/10.1109/fpl.2018.00077","title":"DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration","display_name":"DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration","publication_year":2018,"publication_date":"2018-08-01","ids":{"openalex":"https://openalex.org/W2884288768","doi":"https://doi.org/10.1109/fpl.2018.00077","mag":"2884288768"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2018.00077","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2018.00077","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 28th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["arxiv","crossref","datacite"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://arxiv.org/pdf/1807.06434","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010814272","display_name":"Mohamed S. Abdelfattah","orcid":"https://orcid.org/0000-0002-4568-8932"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Mohamed S. Abdelfattah","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Intel (United States), Santa Clara, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5087980287","display_name":"David Han","orcid":"https://orcid.org/0000-0001-6437-3007"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Han","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Intel (United States), Santa Clara, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071905570","display_name":"Andrew Bitar","orcid":null},"institutions":[{"id":"https://openalex.org/I185261750","display_name":"University of Toronto","ror":"https://ror.org/03dbr7087","country_code":"CA","type":"education","lineage":["https://openalex.org/I185261750"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Andrew Bitar","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","University of Toronto, Toronto, Canada"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"University of Toronto, Toronto, Canada","institution_ids":["https://openalex.org/I185261750"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015845004","display_name":"Roberto DiCecco","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Roberto DiCecco","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Intel (United States), Santa Clara, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079144168","display_name":"Shane O\u2019Connell","orcid":"https://orcid.org/0000-0002-1693-9157"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shane O'Connell","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Intel (United States), Santa Clara, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001707094","display_name":"Nitika Shanker","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Nitika Shanker","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017043410","display_name":"Joseph Lin Chu","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Joseph Chu","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5077494040","display_name":"Ian Prins","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Ian Prins","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067256800","display_name":"Joshua Fender","orcid":null},"institutions":[{"id":"https://openalex.org/I22433950","display_name":"Altera (United States)","ror":"https://ror.org/017b7j426","country_code":"US","type":"company","lineage":["https://openalex.org/I22433950"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Joshua Fender","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Altera (United States), San Jose, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Altera (United States), San Jose, United States","institution_ids":["https://openalex.org/I22433950"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110939130","display_name":"Andrew C. Ling","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew C. Ling","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Intel (United States), Santa Clara, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030055647","display_name":"Gordon R. Chiu","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Gordon R. Chiu","raw_affiliation_strings":["Programmable Solutions Group, Intel Toronto, Canada","Intel (United States), Santa Clara, United States"],"affiliations":[{"raw_affiliation_string":"Programmable Solutions Group, Intel Toronto, Canada","institution_ids":[]},{"raw_affiliation_string":"Intel (United States), Santa Clara, United States","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":11,"corresponding_author_ids":["https://openalex.org/A5010814272"],"corresponding_institution_ids":["https://openalex.org/I1343180700"],"apc_list":null,"apc_paid":null,"fwci":0.36825711,"has_fulltext":true,"cited_by_count":8,"citation_normalized_percentile":{"value":0.62860363,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"411","last_page":"4117"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9559999704360962,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9559999704360962,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9531999826431274,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11948","display_name":"Machine Learning in Materials Science","score":0.9459999799728394,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8496620655059814},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.7214531302452087},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.6703999042510986},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.6527115106582642},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6332935690879822},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5405977368354797},{"id":"https://openalex.org/keywords/deep-learning","display_name":"Deep learning","score":0.5295197367668152},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.49092891812324524},{"id":"https://openalex.org/keywords/recurrent-neural-network","display_name":"Recurrent neural network","score":0.42150601744651794},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41758131980895996},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.35888415575027466},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.3392123579978943},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2481413185596466},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1425321102142334}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8496620655059814},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.7214531302452087},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.6703999042510986},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.6527115106582642},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6332935690879822},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5405977368354797},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.5295197367668152},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.49092891812324524},{"id":"https://openalex.org/C147168706","wikidata":"https://www.wikidata.org/wiki/Q1457734","display_name":"Recurrent neural network","level":3,"score":0.42150601744651794},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41758131980895996},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.35888415575027466},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.3392123579978943},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2481413185596466},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1425321102142334}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/fpl.2018.00077","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2018.00077","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 28th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},{"id":"pmh:oai:arXiv.org:1807.06434","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1807.06434","pdf_url":"https://arxiv.org/pdf/1807.06434","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"text"},{"id":"mag:2884288768","is_oa":true,"landing_page_url":"https://arxiv.org/pdf/1807.06434","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"arXiv (Cornell University)","raw_type":null},{"id":"doi:10.48550/arxiv.1807.06434","is_oa":true,"landing_page_url":"https://doi.org/10.48550/arxiv.1807.06434","pdf_url":null,"source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":null,"raw_type":"article"}],"best_oa_location":{"id":"pmh:oai:arXiv.org:1807.06434","is_oa":true,"landing_page_url":"http://arxiv.org/abs/1807.06434","pdf_url":"https://arxiv.org/pdf/1807.06434","source":{"id":"https://openalex.org/S4306400194","display_name":"arXiv (Cornell University)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I205783295","host_organization_name":"Cornell University","host_organization_lineage":["https://openalex.org/I205783295"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"text"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2884288768.pdf","grobid_xml":"https://content.openalex.org/works/W2884288768.grobid-xml"},"referenced_works_count":10,"referenced_works":["https://openalex.org/W2073140603","https://openalex.org/W2107350738","https://openalex.org/W2143612262","https://openalex.org/W2163605009","https://openalex.org/W2574797063","https://openalex.org/W2588448445","https://openalex.org/W2765833400","https://openalex.org/W2789246071","https://openalex.org/W2792503273","https://openalex.org/W6687483927"],"related_works":["https://openalex.org/W2917673601","https://openalex.org/W2730764788","https://openalex.org/W2971910420","https://openalex.org/W2789007918","https://openalex.org/W2799463862","https://openalex.org/W3172512547","https://openalex.org/W3106125969","https://openalex.org/W2622302604","https://openalex.org/W3185237297","https://openalex.org/W2773437690","https://openalex.org/W2282294254","https://openalex.org/W3101306829","https://openalex.org/W2767938670","https://openalex.org/W2728151737","https://openalex.org/W2732358839","https://openalex.org/W2777015551","https://openalex.org/W176433905","https://openalex.org/W3092007829","https://openalex.org/W2529565675","https://openalex.org/W2612473142"],"abstract_inverted_index":{"Overlays":[0],"have":[1],"shown":[2],"significant":[3,35],"promise":[4],"for":[5,12,45,71,85,167],"field-programmable":[6],"gate-arrays":[7],"(FPGAs)":[8],"as":[9,124],"they":[10],"allow":[11],"fast":[13],"development":[14],"cycles":[15],"and":[16,60,98,150,163,187],"remove":[17],"many":[18],"of":[19,22,43,147],"the":[20,23,72,96,205],"challenges":[21],"traditional":[24],"FPGA":[25],"hardware":[26,185],"design":[27],"flow.":[28],"However,":[29],"this":[30,49],"often":[31],"comes":[32],"with":[33,77,90],"a":[34,56,102,112,158,164],"performance":[36,73,146],"burden":[37],"resulting":[38],"in":[39],"very":[40],"little":[41],"adoption":[42],"overlays":[44],"practical":[46],"applications.":[47],"In":[48],"paper,":[50],"we":[51,61,64,80,110,156,178,181],"tailor":[52,183],"an":[53,82,199],"overlay":[54,83],"to":[55,94,128,143,174,192],"specific":[57,115],"application":[58],"domain,":[59],"show":[62,134],"how":[63,135,180],"maintain":[65],"its":[66],"full":[67],"programmability":[68],"without":[69],"paying":[70],"overhead":[74,93],"traditionally":[75],"associated":[76],"overlays.":[78],"Specifically,":[79],"introduce":[81],"targeted":[84],"deep":[86,120],"neural":[87,152],"network":[88],"inference":[89],"only":[91],"~1%":[92],"support":[95],"control":[97],"reprogramming":[99],"logic":[100],"using":[101],"lightweight":[103],"very-long":[104],"instruction":[105],"word":[106],"(VLIW)":[107],"network.":[108],"Additionally,":[109],"implement":[111],"sophisticated":[113],"domain":[114],"graph":[116,137,190],"compiler":[117,138,191],"that":[118],"compiles":[119],"learning":[121],"languages":[122],"such":[123],"Caffe":[125],"or":[126],"Tensorflow":[127],"easily":[129],"target":[130],"our":[131,136,184,189],"overlay.":[132],"We":[133],"performs":[139],"architecture-driven":[140],"software":[141],"optimizations":[142],"significantly":[144],"boost":[145],"both":[148],"convolutional":[149],"recurrent":[151],"networks":[153],"(CNNs/RNNs)":[154],"-":[155,204],"demonstrate":[157],"3x":[159],"improvement":[160,166],"on":[161,196,198,209],"ResNet-101":[162],"12x":[165],"long":[168],"short-term":[169],"memory":[170],"(LSTM)":[171],"cells,":[172],"compared":[173],"naive":[175],"implementations.":[176],"Finally,":[177],"describe":[179],"can":[182],"overlay,":[186],"use":[188],"achieve":[193],"~900":[194],"fps":[195],"GoogLeNet":[197],"Intel":[200],"Arria":[201],"10":[202],"1150":[203],"fastest":[206],"ever":[207],"reported":[208],"comparable":[210],"FPGAs.":[211]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":1}],"updated_date":"2026-02-09T09:26:11.010843","created_date":"2025-10-10T00:00:00"}