{"id":"https://openalex.org/W2527420500","doi":"https://doi.org/10.1109/fpl.2016.7577309","title":"DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications","display_name":"DT-CGRA: Dual-track coarse-grained reconfigurable architecture for stream applications","publication_year":2016,"publication_date":"2016-08-01","ids":{"openalex":"https://openalex.org/W2527420500","doi":"https://doi.org/10.1109/fpl.2016.7577309","mag":"2527420500"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2016.7577309","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2016.7577309","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 26th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066019284","display_name":"Xitian Fan","orcid":"https://orcid.org/0000-0001-8698-6584"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xitian Fan","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039504617","display_name":"Huimin Li","orcid":"https://orcid.org/0000-0001-7494-6745"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huimin Li","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047813206","display_name":"Wei Cao","orcid":"https://orcid.org/0000-0003-1431-7060"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wei Cao","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5002732486","display_name":"Lingli Wang","orcid":"https://orcid.org/0000-0002-0579-3527"},"institutions":[{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lingli Wang","raw_affiliation_strings":["State Key Laboratory of ASIC and System, Fudan University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, Fudan University, Shanghai, China","institution_ids":["https://openalex.org/I24943067"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I24943067"],"apc_list":null,"apc_paid":null,"fwci":0.6723,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.62335623,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"25","issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7274203896522522},{"id":"https://openalex.org/keywords/feature-extraction","display_name":"Feature extraction","score":0.477655291557312},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.4472907781600952},{"id":"https://openalex.org/keywords/support-vector-machine","display_name":"Support vector machine","score":0.4400542378425598},{"id":"https://openalex.org/keywords/inference-engine","display_name":"Inference engine","score":0.41688498854637146},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.40902990102767944},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39854153990745544},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3581739068031311},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34663933515548706},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.33535489439964294}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7274203896522522},{"id":"https://openalex.org/C52622490","wikidata":"https://www.wikidata.org/wiki/Q1026626","display_name":"Feature extraction","level":2,"score":0.477655291557312},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.4472907781600952},{"id":"https://openalex.org/C12267149","wikidata":"https://www.wikidata.org/wiki/Q282453","display_name":"Support vector machine","level":2,"score":0.4400542378425598},{"id":"https://openalex.org/C46743427","wikidata":"https://www.wikidata.org/wiki/Q1341685","display_name":"Inference engine","level":3,"score":0.41688498854637146},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.40902990102767944},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39854153990745544},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3581739068031311},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34663933515548706},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.33535489439964294}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2016.7577309","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2016.7577309","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 26th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":31,"referenced_works":["https://openalex.org/W170472577","https://openalex.org/W179875071","https://openalex.org/W201652765","https://openalex.org/W1517544154","https://openalex.org/W1932847118","https://openalex.org/W2002555321","https://openalex.org/W2006312753","https://openalex.org/W2015631780","https://openalex.org/W2025787141","https://openalex.org/W2027994226","https://openalex.org/W2067523571","https://openalex.org/W2094756095","https://openalex.org/W2098335003","https://openalex.org/W2102543317","https://openalex.org/W2104869032","https://openalex.org/W2124386111","https://openalex.org/W2158899491","https://openalex.org/W2161969291","https://openalex.org/W2162915993","https://openalex.org/W2163605009","https://openalex.org/W2534060050","https://openalex.org/W2912425543","https://openalex.org/W2952230511","https://openalex.org/W4238973935","https://openalex.org/W4241238426","https://openalex.org/W6607333740","https://openalex.org/W6630904199","https://openalex.org/W6640090378","https://openalex.org/W6651700774","https://openalex.org/W6683738474","https://openalex.org/W6684191040"],"related_works":["https://openalex.org/W2090763504","https://openalex.org/W148178222","https://openalex.org/W2104657898","https://openalex.org/W1948992892","https://openalex.org/W1886884218","https://openalex.org/W1910826599","https://openalex.org/W2012353789","https://openalex.org/W2530420969","https://openalex.org/W2051187167","https://openalex.org/W1980100242"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,28,87,128],"new":[4],"type":[5],"of":[6,54],"coarse-grained":[7],"reconfigurable":[8],"architecture":[9],"(CGRA)":[10],"for":[11,24],"the":[12,52,65,107,118],"object":[13,93],"inference":[14,94],"domain":[15],"in":[16,41,46,92],"machine":[17,89],"learning.":[18],"The":[19,37,102],"proposed":[20,108],"CGRA":[21,38,109],"is":[22,35,39],"optimized":[23],"stream":[25],"processing":[26],"and":[27,44,78,100,122],"correspondent":[29],"programming":[30],"model":[31,34],"called":[32],"dual-track":[33],"proposed.":[36],"realized":[40],"Verilog":[42],"HDL":[43],"implemented":[45],"SMIC":[47],"55":[48],"nm":[49],"process,":[50],"with":[51],"footprint":[53],"3.79":[55],"mm2and":[56],"consuming":[57],"1.79":[58],"W":[59],"at":[60],"500":[61],"MHz.":[62],"To":[63],"evaluate":[64],"performance,":[66],"eight":[67],"machine-learning":[68],"algorithms":[69,85],"including":[70],"HOG,":[71],"CNN,":[72],"k-means,":[73],"PCA,":[74],"SPM,":[75],"linear-SVM,":[76],"Softmax":[77],"Joint-Bayesian":[79],"are":[80],"selected":[81],"as":[82],"benchmarks.":[83],"These":[84],"cover":[86],"general":[88],"learning":[90],"flow":[91],"domain:":[95],"feature":[96,98],"extraction,":[97],"selection":[99],"inference.":[101],"experimental":[103],"results":[104],"show":[105],"that":[106],"can":[110],"gain":[111],"1443\u00d7":[112],"average":[113],"energy":[114,124],"efficiency":[115,125],"comparing":[116,126],"to":[117,127],"Intel":[119],"i7-3770":[120],"CPU":[121],"7.82\u00d7":[123],"high":[129],"performance":[130],"FPGA":[131],"solution":[132],"[19].":[133]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}