{"id":"https://openalex.org/W1642387417","doi":"https://doi.org/10.1109/fpl.2015.7294022","title":"Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions","display_name":"Enabling seamless execution on hybrid CPU/FPGA systems: Challenges & directions","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W1642387417","doi":"https://doi.org/10.1109/fpl.2015.7294022","mag":"1642387417"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2015.7294022","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2015.7294022","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 25th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009873216","display_name":"Meena Belwal","orcid":"https://orcid.org/0000-0002-9141-6815"},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Meena Belwal","raw_affiliation_strings":["Department of Computer Science and Engineering, Amrita School of Engineering, Bangalore, Amrita Vishwavidya Peetham (Amrita University), India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Amrita School of Engineering, Bangalore, Amrita Vishwavidya Peetham (Amrita University), India","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064989404","display_name":"Madhura Purnaprajna","orcid":"https://orcid.org/0000-0003-4995-6233"},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Madhura Purnaprajna","raw_affiliation_strings":["Department of Computer Science and Engineering, Amrita School of Engineering, Bangalore, Amrita Vishwavidya Peetham (Amrita University), India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Amrita School of Engineering, Bangalore, Amrita Vishwavidya Peetham (Amrita University), India","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"last","author":{"id":null,"display_name":"Sudarshan TSB","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sudarshan TSB","raw_affiliation_strings":["Department of Computer Science and Engineering, Amrita School of Engineering, Bangalore, Amrita Vishwavidya Peetham (Amrita University), India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Amrita School of Engineering, Bangalore, Amrita Vishwavidya Peetham (Amrita University), India","institution_ids":["https://openalex.org/I81556334"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I81556334"],"apc_list":null,"apc_paid":null,"fwci":1.0205,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.7254787,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.851571798324585},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8039700984954834},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6498419046401978},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5694248080253601},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5337715148925781},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5213114619255066},{"id":"https://openalex.org/keywords/central-processing-unit","display_name":"Central processing unit","score":0.5209823250770569},{"id":"https://openalex.org/keywords/cpu-shielding","display_name":"CPU shielding","score":0.5208868980407715},{"id":"https://openalex.org/keywords/arm-architecture","display_name":"ARM architecture","score":0.46895426511764526},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.456523597240448},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4151266813278198},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3185296654701233},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2107035219669342}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.851571798324585},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8039700984954834},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6498419046401978},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5694248080253601},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5337715148925781},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5213114619255066},{"id":"https://openalex.org/C49154492","wikidata":"https://www.wikidata.org/wiki/Q5300","display_name":"Central processing unit","level":2,"score":0.5209823250770569},{"id":"https://openalex.org/C180613757","wikidata":"https://www.wikidata.org/wiki/Q5013757","display_name":"CPU shielding","level":3,"score":0.5208868980407715},{"id":"https://openalex.org/C26771161","wikidata":"https://www.wikidata.org/wiki/Q16980","display_name":"ARM architecture","level":2,"score":0.46895426511764526},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.456523597240448},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4151266813278198},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3185296654701233},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2107035219669342},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2015.7294022","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2015.7294022","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 25th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W1576507372","https://openalex.org/W1969168818","https://openalex.org/W1982377660","https://openalex.org/W1987063035","https://openalex.org/W1990079240","https://openalex.org/W1993168130","https://openalex.org/W1996198117","https://openalex.org/W2004232634","https://openalex.org/W2008531154","https://openalex.org/W2008781896","https://openalex.org/W2016423739","https://openalex.org/W2016889342","https://openalex.org/W2018055497","https://openalex.org/W2020667374","https://openalex.org/W2027103958","https://openalex.org/W2029247336","https://openalex.org/W2075329791","https://openalex.org/W2092213324","https://openalex.org/W2094835990","https://openalex.org/W2095761111","https://openalex.org/W2098681688","https://openalex.org/W2102596689","https://openalex.org/W2115069592","https://openalex.org/W2126026097","https://openalex.org/W2127103393","https://openalex.org/W2127699991","https://openalex.org/W2141597697","https://openalex.org/W2151758817","https://openalex.org/W2153402554","https://openalex.org/W2154209144","https://openalex.org/W2158544590","https://openalex.org/W2163916557","https://openalex.org/W2171318521","https://openalex.org/W2171429297","https://openalex.org/W2293877842","https://openalex.org/W2554510265","https://openalex.org/W2589362939","https://openalex.org/W2912425543","https://openalex.org/W3148466761","https://openalex.org/W4244327494","https://openalex.org/W4320526025","https://openalex.org/W6674220735","https://openalex.org/W6733842127"],"related_works":["https://openalex.org/W2387982802","https://openalex.org/W1896942098","https://openalex.org/W1991061790","https://openalex.org/W2088078730","https://openalex.org/W2400763249","https://openalex.org/W1482063109","https://openalex.org/W2473478803","https://openalex.org/W2729363167","https://openalex.org/W3015832319","https://openalex.org/W2974672311"],"abstract_inverted_index":{"Today's":[0],"computing":[1],"systems":[2,13,92,114,145],"are":[3],"heterogeneous,":[4],"with":[5],"diverse":[6],"micro-architectures.":[7],"It":[8],"is":[9,80],"common":[10],"to":[11,28,44,54,110,115,149,151],"design":[12],"comprising":[14],"multi-core":[15],"CPUs,":[16,55,79],"Digital":[17],"Signal":[18],"Processors":[19],"(DSP)":[20],"and":[21,34,57,146],"Graphic":[22],"Processing":[23],"Units":[24],"(GPUs).":[25],"In":[26,52,65],"addition":[27],"these":[29],"devices,":[30],"the":[31,105,136],"extensive":[32],"configurability":[33],"parallelism":[35],"in":[36,72,95,103,126],"Field":[37],"Programmable":[38],"Gate":[39],"Arrays":[40],"(FPGAs)":[41],"has":[42,100],"proven":[43],"be":[45],"advantageous":[46],"for":[47,118,142],"accelerating":[48],"complex":[49],"computational":[50],"problems.":[51],"comparison":[53],"DSPs":[56],"GPUs,":[58],"FPGAs":[59,77],"have":[60],"a":[61,73,81,85],"distinctly":[62],"different":[63],"microarchitecture.":[64],"this":[66],"context,":[67],"enabling":[68],"seamless":[69],"application":[70],"execution":[71],"system":[74,96,108,140],"composed":[75],"of":[76,89,138],"alongside":[78],"major":[82],"challenge.":[83],"As":[84],"consequence,":[86],"simplifying":[87],"programmability":[88],"hybrid":[90,113,144],"CPU/FPGA":[91,111,143],"demands":[93],"innovations":[94],"software":[97],"support.":[98],"There":[99],"been":[101],"research":[102],"extending":[104],"traditional":[106],"CPU-only":[107],"techniques":[109,125],"based":[112],"make":[116],"way":[117],"FPGA-based":[119],"mainstream":[120],"computing.":[121],"This":[122],"article":[123],"surveys":[124],"dynamic":[127],"task":[128],"management":[129],"aimed":[130],"at":[131],"reducing":[132],"or":[133],"completely":[134],"eliminating":[135],"burden":[137],"operating":[139],"writers":[141],"provide":[147],"insight":[148],"researchers":[150],"explore":[152],"further.":[153]},"counts_by_year":[{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}