{"id":"https://openalex.org/W1675151442","doi":"https://doi.org/10.1109/fpl.2015.7294013","title":"Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs","display_name":"Fine-tuning CLB placement to speed up reconfigurations in NVM-based FPGAs","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W1675151442","doi":"https://doi.org/10.1109/fpl.2015.7294013","mag":"1675151442"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2015.7294013","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2015.7294013","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 25th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5000876494","display_name":"Yuan Xue","orcid":"https://orcid.org/0000-0002-5518-165X"},"institutions":[{"id":"https://openalex.org/I86501945","display_name":"University of Delaware","ror":"https://ror.org/01sbq1a82","country_code":"US","type":"education","lineage":["https://openalex.org/I86501945"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Yuan Xue","raw_affiliation_strings":["Department of Electrical and Computer Eng, University of Delaware, Newark, DE, USA","Department of Electrical and Computer Engineering  University of Delaware  Newark 19716  USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Eng, University of Delaware, Newark, DE, USA","institution_ids":["https://openalex.org/I86501945"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering  University of Delaware  Newark 19716  USA","institution_ids":["https://openalex.org/I86501945"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084074589","display_name":"Patrick Cronin","orcid":"https://orcid.org/0000-0003-2091-4830"},"institutions":[{"id":"https://openalex.org/I86501945","display_name":"University of Delaware","ror":"https://ror.org/01sbq1a82","country_code":"US","type":"education","lineage":["https://openalex.org/I86501945"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Patrick Cronin","raw_affiliation_strings":["Department of Electrical and Computer Eng, University of Delaware, Newark, DE, USA","Department of Electrical and Computer Engineering  University of Delaware  Newark 19716  USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Eng, University of Delaware, Newark, DE, USA","institution_ids":["https://openalex.org/I86501945"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering  University of Delaware  Newark 19716  USA","institution_ids":["https://openalex.org/I86501945"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016268650","display_name":"Chengmo Yang","orcid":"https://orcid.org/0000-0003-0978-1504"},"institutions":[{"id":"https://openalex.org/I86501945","display_name":"University of Delaware","ror":"https://ror.org/01sbq1a82","country_code":"US","type":"education","lineage":["https://openalex.org/I86501945"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chengmo Yang","raw_affiliation_strings":["Department of Electrical and Computer Eng, University of Delaware, Newark, DE, USA","Department of Electrical and Computer Engineering  University of Delaware  Newark 19716  USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Eng, University of Delaware, Newark, DE, USA","institution_ids":["https://openalex.org/I86501945"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering  University of Delaware  Newark 19716  USA","institution_ids":["https://openalex.org/I86501945"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5066534595","display_name":"Jingtong Hu","orcid":"https://orcid.org/0000-0003-4029-4034"},"institutions":[{"id":"https://openalex.org/I115475287","display_name":"Oklahoma State University","ror":"https://ror.org/01g9vbr38","country_code":"US","type":"education","lineage":["https://openalex.org/I115475287"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jingtong Hu","raw_affiliation_strings":["School of Electrical and Computer Eng, Oklahoma State University, Stillwater, OK, USA","School of Electrical and computer Engineering, Oklahoma State University, Stillwater, 74078 USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Eng, Oklahoma State University, Stillwater, OK, USA","institution_ids":["https://openalex.org/I115475287"]},{"raw_affiliation_string":"School of Electrical and computer Engineering, Oklahoma State University, Stillwater, 74078 USA","institution_ids":["https://openalex.org/I115475287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5000876494"],"corresponding_institution_ids":["https://openalex.org/I86501945"],"apc_list":null,"apc_paid":null,"fwci":3.2298,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.91664414,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8314135074615479},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8020555973052979},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7655011415481567},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6247454881668091},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6100549101829529},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.5881080627441406},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5253381729125977},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.45094043016433716},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4289686381816864},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.41238802671432495},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.404363214969635},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33689072728157043},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.32656773924827576}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8314135074615479},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8020555973052979},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7655011415481567},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6247454881668091},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6100549101829529},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.5881080627441406},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5253381729125977},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.45094043016433716},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4289686381816864},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.41238802671432495},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.404363214969635},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33689072728157043},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.32656773924827576},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2015.7294013","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2015.7294013","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 25th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8399999737739563,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":32,"referenced_works":["https://openalex.org/W1524957862","https://openalex.org/W1968704626","https://openalex.org/W1992931950","https://openalex.org/W2005602803","https://openalex.org/W2020254467","https://openalex.org/W2021483452","https://openalex.org/W2061686471","https://openalex.org/W2061783171","https://openalex.org/W2064360736","https://openalex.org/W2070938449","https://openalex.org/W2071628159","https://openalex.org/W2072383925","https://openalex.org/W2076613578","https://openalex.org/W2085743209","https://openalex.org/W2099105559","https://openalex.org/W2099798359","https://openalex.org/W2105011467","https://openalex.org/W2105307128","https://openalex.org/W2136983830","https://openalex.org/W2142982249","https://openalex.org/W2149135318","https://openalex.org/W2152406824","https://openalex.org/W2153007772","https://openalex.org/W2163027960","https://openalex.org/W2168407251","https://openalex.org/W2222512263","https://openalex.org/W4206262605","https://openalex.org/W4237731741","https://openalex.org/W4244361616","https://openalex.org/W6669768687","https://openalex.org/W6675723040","https://openalex.org/W7045235261"],"related_works":["https://openalex.org/W2164363068","https://openalex.org/W2020254467","https://openalex.org/W2145701142","https://openalex.org/W2133138773","https://openalex.org/W2151975926","https://openalex.org/W2147614424","https://openalex.org/W2366708603","https://openalex.org/W2953403042","https://openalex.org/W2172988812","https://openalex.org/W2150194641"],"abstract_inverted_index":{"Non-volatile":[0],"memories":[1],"(NVMs)":[2],"outperform":[3],"traditional":[4,167],"SRAMs":[5],"in":[6,84,130,181],"terms":[7],"of":[8,25,33,49,61,66,76,110,138,213],"low":[9],"power":[10],"consumption,":[11],"high":[12,18],"capacity,":[13],"near-zero":[14],"power-on":[15],"delay,":[16],"and":[17,113,166,169,211],"error-resistance.":[19],"Researchers":[20],"have":[21,90],"demonstrated":[22],"the":[23,45,57,64,69,105,111,146,158,163,203,209],"possibilities":[24],"implementing":[26],"FPGA":[27,53,70,86,106],"building":[28],"blocks":[29],"with":[30],"various":[31],"types":[32,137],"NVMs.":[34],"However,":[35],"NVMs":[36],"also":[37],"bring":[38],"several":[39],"new":[40],"design":[41],"challenges":[42],"to":[43,103,126,144,156,161,173,198],"FPGAs:":[44],"slow":[46,112],"write":[47,59],"performance":[48,210],"NVM":[50,62,78,115,200],"may":[51],"degrade":[52],"(re)configuration":[54],"speed,":[55],"while":[56],"limited":[58],"endurance":[60,212],"constrains":[63],"number":[65],"times":[67],"that":[68,140,193],"can":[71,141],"be":[72,142],"(re)configured.":[73],"Unfortunately,":[74],"none":[75],"these":[77],"features":[79],"are":[80,119,179],"taken":[81],"into":[82],"consideration":[83],"current":[85],"synthesis":[87],"tools,":[88],"which":[89],"been":[91],"optimized":[92],"solely":[93],"for":[94,154],"SRAM-based":[95],"FPGAs.":[96,132,215],"To":[97],"tackle":[98],"this":[99],"limitation,":[100],"we":[101,134,150],"propose":[102],"make":[104],"placement":[107,159],"process":[108,160],"aware":[109],"costly":[114],"writes.":[116],"Our":[117],"contributions":[118],"three-fold:":[120],"We":[121],"first":[122],"construct":[123],"mathematical":[124],"models":[125],"characterize":[127],"reconfiguration":[128,147,164,204],"costs":[129],"NVM-based":[131,214],"Second,":[133],"identify":[135],"three":[136,152],"flexibilities":[139],"exploited":[143],"reduce":[145],"cost.":[148],"Finally,":[149],"present":[151],"approaches":[153],"designers":[155],"fine-tune":[157],"balance":[162],"cost":[165],"timing":[168],"routability":[170],"constraints":[171],"according":[172],"their":[174],"needs.":[175],"The":[176],"proposed":[177],"algorithms":[178],"incorporated":[180],"Verilog-to-Routing":[182],"(VTR)":[183],"CAD":[184],"tool.":[185],"Experiments":[186],"on":[187],"standard":[188],"MCNC":[189],"benchmark":[190],"circuits":[191],"show":[192],"our":[194],"approach":[195],"eliminates":[196],"up":[197],"67%":[199],"writes":[201],"during":[202],"process,":[205],"thus":[206],"effectively":[207],"improving":[208]},"counts_by_year":[{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
