{"id":"https://openalex.org/W1971272638","doi":"https://doi.org/10.1109/fpl.2014.6927478","title":"Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs","display_name":"Effective emulation of permanent faults in ASICs through dynamically reconfigurable FPGAs","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W1971272638","doi":"https://doi.org/10.1109/fpl.2014.6927478","mag":"1971272638"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2014.6927478","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5009336869","display_name":"Ernesto S\u00e1nchez","orcid":"https://orcid.org/0000-0002-7042-295X"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Ernesto Sanchez","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021426042","display_name":"Luca Sterpone","orcid":"https://orcid.org/0000-0002-3080-2560"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luca Sterpone","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042340641","display_name":"Anees Ullah","orcid":"https://orcid.org/0000-0002-4770-4967"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Anees Ullah","raw_affiliation_strings":["Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dipartimento di Automatica e Informatica, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Dipartimento di Automatica e Informatica - Politecnico di Torino, ITALY#TAB#","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.2776,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.82000164,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.8712395429611206},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7757103443145752},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.7631274461746216},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7135750651359558},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6959545016288757},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6927057504653931},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5912015438079834},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.5831518769264221},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5757935047149658},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5397009253501892},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.5334394574165344},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3512769937515259},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2394617199897766},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22557568550109863},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.09389728307723999},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08724328875541687},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.06007492542266846}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.8712395429611206},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7757103443145752},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.7631274461746216},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7135750651359558},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6959545016288757},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6927057504653931},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5912015438079834},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.5831518769264221},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5757935047149658},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5397009253501892},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.5334394574165344},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3512769937515259},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2394617199897766},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22557568550109863},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.09389728307723999},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08724328875541687},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.06007492542266846},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2014.6927478","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927478","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},{"id":"pmh:oai:porto.polito.it:2571150","is_oa":false,"landing_page_url":"http://porto.polito.it/2571150/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1484771588","https://openalex.org/W1555374769","https://openalex.org/W1985457698","https://openalex.org/W2018865800","https://openalex.org/W2021709993","https://openalex.org/W2044069930","https://openalex.org/W2048110685","https://openalex.org/W2119280572","https://openalex.org/W2137697489","https://openalex.org/W2145897936","https://openalex.org/W2149583371","https://openalex.org/W2156764012","https://openalex.org/W2159352256","https://openalex.org/W2164363068","https://openalex.org/W2167328871","https://openalex.org/W2989364934"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2103996454","https://openalex.org/W2106791114","https://openalex.org/W3029775214","https://openalex.org/W2291587020","https://openalex.org/W2390650884","https://openalex.org/W2118560622","https://openalex.org/W2145233434","https://openalex.org/W2122965477","https://openalex.org/W2111105659"],"abstract_inverted_index":{"Hardware":[0],"fault":[1,19,34,54,62,73],"emulation":[2,35],"for":[3,17,72],"Application":[4],"Specific":[5],"Integrated":[6],"Circuits":[7],"(ASICs)":[8],"on":[9,30],"FPGAs":[10],"can":[11],"considerably":[12],"reduce":[13],"the":[14,18],"time":[15],"required":[16],"simulation.":[20],"This":[21],"paper":[22],"presents":[23],"a":[24,40],"methodology":[25],"to":[26],"emulate":[27],"ASIC":[28,50],"faults":[29],"state-of-the-art":[31],"FPGAs.":[32],"The":[33,64,80],"is":[36,83,97],"achieved":[37],"by":[38],"following":[39],"fully":[41],"automated":[42],"process":[43],"consisting":[44],"of:":[45],"constrained":[46],"technology":[47],"mapping":[48],"of":[49,53,57,93],"net-list;":[51],"creation":[52],"dictionary,":[55],"generation":[56],"faulty":[58],"partial":[59,69],"bit-streams":[60],"and":[61,75,89,95],"emulation.":[63],"proposed":[65],"approach":[66],"exploits":[67],"run-time":[68],"reconfiguration":[70],"techniques":[71],"injection":[74],"avoids":[76],"full":[77],"net-list":[78],"re-compilations.":[79],"method's":[81],"feasibility":[82],"assessed":[84],"through":[85],"carefully":[86],"selected":[87],"circuits":[88],"overhead":[90],"in":[91],"terms":[92],"area":[94],"timing":[96],"reported.":[98]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}