{"id":"https://openalex.org/W2046095613","doi":"https://doi.org/10.1109/fpl.2014.6927444","title":"Ready PCIe data streaming solutions for FPGAs","display_name":"Ready PCIe data streaming solutions for FPGAs","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2046095613","doi":"https://doi.org/10.1109/fpl.2014.6927444","mag":"2046095613"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2014.6927444","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927444","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5055093027","display_name":"Thomas B. Preu\u00dfer","orcid":"https://orcid.org/0000-0003-3998-7896"},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Thomas B. Preusser","raw_affiliation_strings":["Technische Universitat Dresden, Germany#TAB#"],"affiliations":[{"raw_affiliation_string":"Technische Universitat Dresden, Germany#TAB#","institution_ids":["https://openalex.org/I78650965"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071775505","display_name":"Rainer G. Spallek","orcid":null},"institutions":[{"id":"https://openalex.org/I78650965","display_name":"TU Dresden","ror":"https://ror.org/042aqky30","country_code":"DE","type":"education","lineage":["https://openalex.org/I78650965"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Rainer G. Spallek","raw_affiliation_strings":["Technische Universit\u00e4t Dresden, Germany","Technische Universitat Dresden, Germany#TAB#"],"affiliations":[{"raw_affiliation_string":"Technische Universit\u00e4t Dresden, Germany","institution_ids":["https://openalex.org/I78650965"]},{"raw_affiliation_string":"Technische Universitat Dresden, Germany#TAB#","institution_ids":["https://openalex.org/I78650965"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5055093027"],"corresponding_institution_ids":["https://openalex.org/I78650965"],"apc_list":null,"apc_paid":null,"fwci":1.7241,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.86316421,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9835000038146973,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9835000038146973,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9832000136375427,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.973800003528595,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pci-express","display_name":"PCI Express","score":0.9504251480102539},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8112744092941284},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8070769309997559},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5837505459785461},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5824915170669556},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5487542748451233},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4894229471683502},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.47269466519355774},{"id":"https://openalex.org/keywords/workstation","display_name":"Workstation","score":0.4709808826446533},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.41477036476135254},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.4134840965270996},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33230239152908325},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.15639200806617737},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.09092077612876892},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08010730147361755}],"concepts":[{"id":"https://openalex.org/C64270927","wikidata":"https://www.wikidata.org/wiki/Q206924","display_name":"PCI Express","level":3,"score":0.9504251480102539},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8112744092941284},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8070769309997559},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5837505459785461},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5824915170669556},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5487542748451233},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4894229471683502},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.47269466519355774},{"id":"https://openalex.org/C67953723","wikidata":"https://www.wikidata.org/wiki/Q192525","display_name":"Workstation","level":2,"score":0.4709808826446533},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.41477036476135254},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.4134840965270996},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33230239152908325},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.15639200806617737},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.09092077612876892},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08010730147361755},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2014.6927444","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927444","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5299999713897705}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W1988269228","https://openalex.org/W2046964635","https://openalex.org/W2152983905","https://openalex.org/W2169642032"],"related_works":["https://openalex.org/W4385894176","https://openalex.org/W2347371119","https://openalex.org/W2612768808","https://openalex.org/W3131402800","https://openalex.org/W2388965158","https://openalex.org/W2366201982","https://openalex.org/W2808480228","https://openalex.org/W2593071546","https://openalex.org/W2805641962","https://openalex.org/W2766604058"],"abstract_inverted_index":{"The":[0],"PCIe":[1,22,44],"attachment":[2],"of":[3,72,75],"FPGA":[4],"accelerators":[5],"within":[6],"host":[7],"workstations":[8],"is":[9],"convenient":[10],"and":[11,19,47,67,80,85],"offers":[12],"a":[13,91],"high-performance":[14],"direct":[15],"integration.":[16],"FPGA-boards":[17],"designed":[18],"equipped":[20],"as":[21],"extension":[23],"cards":[24],"are":[25,49],"available":[26],"off-the-shelf.":[27],"This":[28,61],"paper":[29,62],"gives":[30],"an":[31],"overview":[32],"on":[33,94,102],"options":[34],"to":[35,96],"provide":[36],"data":[37],"streaming":[38],"abstractions":[39],"in":[40,70],"user":[41],"applications":[42],"using":[43],"technology.":[45],"RIFFA":[46],"Xillybus":[48],"straightforward":[50],"implementations,":[51],"which":[52],"aim":[53],"at":[54,58],"providing":[55,90],"ready":[56],"solutions":[57],"this":[59],"level.":[60],"will":[63],"describe":[64],"these":[65],"platforms":[66],"evaluate":[68],"them":[69],"terms":[71],"their":[73,77],"ease":[74],"use,":[76],"perceived":[78],"maturity":[79],"the":[81,98,103],"performance":[82],"metrics":[83],"bandwidth":[84],"latency.":[86],"It":[87],"concludes":[88],"with":[89],"brief":[92],"guideline":[93],"how":[95],"select":[97],"proper":[99],"platform":[100],"depending":[101],"usage":[104],"context.":[105]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}