{"id":"https://openalex.org/W2154075693","doi":"https://doi.org/10.1109/fpl.2014.6927420","title":"Leakage and performance aware resource management for 2D dynamically reconfigurable FPGA architectures","display_name":"Leakage and performance aware resource management for 2D dynamically reconfigurable FPGA architectures","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W2154075693","doi":"https://doi.org/10.1109/fpl.2014.6927420","mag":"2154075693"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2014.6927420","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927420","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034834602","display_name":"Siqi Wang","orcid":"https://orcid.org/0000-0001-8273-0856"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Siqi Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National University of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National University of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019464351","display_name":"Nam Khanh Pham","orcid":null},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Nam Khanh Pham","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National University of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National University of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5060848060","display_name":"Amit Kumar Singh","orcid":"https://orcid.org/0000-0003-2056-0569"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Amit Kumar Singh","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National University of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National University of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100755285","display_name":"Akash Kumar","orcid":"https://orcid.org/0000-0001-7125-1737"},"institutions":[{"id":"https://openalex.org/I165932596","display_name":"National University of Singapore","ror":"https://ror.org/01tgyzw49","country_code":"SG","type":"education","lineage":["https://openalex.org/I165932596"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Akash Kumar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, National University of Singapore, Singapore"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, National University of Singapore, Singapore","institution_ids":["https://openalex.org/I165932596"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5034834602"],"corresponding_institution_ids":["https://openalex.org/I165932596"],"apc_list":null,"apc_paid":null,"fwci":0.3065,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.62249423,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8217208385467529},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7737231254577637},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7263649702072144},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6481544971466064},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.589033842086792},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.5311609506607056},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4951569139957428},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3309769928455353},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18784061074256897},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09164205193519592}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8217208385467529},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7737231254577637},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7263649702072144},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6481544971466064},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.589033842086792},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.5311609506607056},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4951569139957428},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3309769928455353},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18784061074256897},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09164205193519592},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2014.6927420","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927420","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.44999998807907104,"display_name":"Decent work and economic growth","id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W1967183647","https://openalex.org/W1969303161","https://openalex.org/W2041557219","https://openalex.org/W2080618082","https://openalex.org/W2087868026","https://openalex.org/W2095815242","https://openalex.org/W2106970052","https://openalex.org/W2135884554","https://openalex.org/W2137628541","https://openalex.org/W2137978438","https://openalex.org/W2142386205","https://openalex.org/W2145071646","https://openalex.org/W2171717586","https://openalex.org/W2171865075","https://openalex.org/W2630900289","https://openalex.org/W3144709913","https://openalex.org/W3146124336","https://openalex.org/W3151356109","https://openalex.org/W4245322803","https://openalex.org/W4250661686","https://openalex.org/W6676217745","https://openalex.org/W6680288061"],"related_works":["https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2340647897","https://openalex.org/W2808484818","https://openalex.org/W1574948540"],"abstract_inverted_index":{"The":[0,40,102,136],"variety":[1],"of":[2,38,42,58,62,79],"applications":[3],"for":[4,97,114,125,133],"field":[5],"programmable":[6],"gate":[7],"arrays":[8],"(FPGAs)":[9],"is":[10,15,56,105,131],"continuously":[11],"growing,":[12],"thus":[13],"it":[14],"important":[16],"to":[17,52,91,141],"address":[18],"power":[19,30,36,95],"consumption":[20,37,96],"issues":[21],"during":[22],"the":[23,59,76,93,116],"operation.":[24],"As":[25],"technological":[26],"node":[27],"shrinks,":[28],"leakage":[29,63,94,144],"becomes":[31],"increasingly":[32],"critical":[33],"in":[34,74],"overall":[35],"FPGA.":[39],"technique":[41],"configuration":[43],"pre-fetching":[44],"(loads":[45],"configurations":[46],"as":[47,49],"soon":[48],"possible)":[50],"adopted":[51,132],"achieve":[53],"high":[54],"performance":[55],"one":[57],"major":[60],"reasons":[61],"waste":[64],"since":[65],"regions":[66],"containing":[67],"reconfiguration":[68,80],"information":[69],"cannot":[70],"be":[71],"powered":[72],"down":[73],"between":[75,143],"time":[77],"gap":[78],"and":[81,110,121,146],"execution.":[82],"In":[83],"this":[84],"work,":[85],"we":[86],"present":[87],"a":[88,122],"heuristic":[89,103],"approach":[90],"minimize":[92],"two-dimensional":[98],"reconfigurable":[99],"FPGA":[100],"architectures.":[101],"scheduler":[104],"based":[106],"on":[107],"list":[108],"scheduling":[109],"exploits":[111],"dynamic":[112],"priority":[113],"sorting":[115],"tasks":[117],"into":[118],"schedule":[119,147],"order":[120],"cost":[123,137],"function":[124,138],"cell":[126],"allocation.":[127],"Farthest":[128],"placement":[129],"scheme":[130],"anti-fragmentation":[134],"purpose.":[135],"provides":[139],"control":[140],"compromise":[142],"dissipation":[145],"length.":[148]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}