{"id":"https://openalex.org/W1977635655","doi":"https://doi.org/10.1109/fpl.2014.6927384","title":"Enabling SRAM-PUFs on Xilinx FPGAs","display_name":"Enabling SRAM-PUFs on Xilinx FPGAs","publication_year":2014,"publication_date":"2014-09-01","ids":{"openalex":"https://openalex.org/W1977635655","doi":"https://doi.org/10.1109/fpl.2014.6927384","mag":"1977635655"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2014.6927384","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927384","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103034917","display_name":"Alexander Wild","orcid":"https://orcid.org/0000-0002-8689-9074"},"institutions":[{"id":"https://openalex.org/I904495901","display_name":"Ruhr University Bochum","ror":"https://ror.org/04tsk2644","country_code":"DE","type":"education","lineage":["https://openalex.org/I904495901"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Alexander Wild","raw_affiliation_strings":["Horst G\u00f6rtz Institute for IT Security, Ruhr University Bochum Germany, Germany","Horst Gortz Inst. for IT-Security, Ruhr-Univ., Bochum, Germany"],"affiliations":[{"raw_affiliation_string":"Horst G\u00f6rtz Institute for IT Security, Ruhr University Bochum Germany, Germany","institution_ids":["https://openalex.org/I904495901"]},{"raw_affiliation_string":"Horst Gortz Inst. for IT-Security, Ruhr-Univ., Bochum, Germany","institution_ids":["https://openalex.org/I904495901"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076453092","display_name":"Tim G\u00fcneysu","orcid":"https://orcid.org/0000-0002-3293-4989"},"institutions":[{"id":"https://openalex.org/I904495901","display_name":"Ruhr University Bochum","ror":"https://ror.org/04tsk2644","country_code":"DE","type":"education","lineage":["https://openalex.org/I904495901"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Tim Guneysu","raw_affiliation_strings":["Horst G\u00f6rtz Institute for IT Security, Ruhr University Bochum Germany, Germany","Horst Gortz Inst. for IT-Security, Ruhr-Univ., Bochum, Germany"],"affiliations":[{"raw_affiliation_string":"Horst G\u00f6rtz Institute for IT Security, Ruhr University Bochum Germany, Germany","institution_ids":["https://openalex.org/I904495901"]},{"raw_affiliation_string":"Horst Gortz Inst. for IT-Security, Ruhr-Univ., Bochum, Germany","institution_ids":["https://openalex.org/I904495901"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5103034917"],"corresponding_institution_ids":["https://openalex.org/I904495901"],"apc_list":null,"apc_paid":null,"fwci":1.5752,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.82047566,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9861000180244446,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8181856870651245},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.8087996244430542},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7364822626113892},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6941496133804321},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6642768383026123},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.6476522088050842},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.573851466178894},{"id":"https://openalex.org/keywords/physical-unclonable-function","display_name":"Physical unclonable function","score":0.4276198744773865},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34480488300323486}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8181856870651245},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.8087996244430542},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7364822626113892},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6941496133804321},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6642768383026123},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.6476522088050842},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.573851466178894},{"id":"https://openalex.org/C8643368","wikidata":"https://www.wikidata.org/wiki/Q4046262","display_name":"Physical unclonable function","level":3,"score":0.4276198744773865},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34480488300323486},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C2779971761","wikidata":"https://www.wikidata.org/wiki/Q629872","display_name":"Arbiter","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2014.6927384","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2014.6927384","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 24th International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.701.1637","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.701.1637","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.sha.rub.de/media/sh/veroeffentlichungen/2014/09/11/Xilinx_PUF.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W609951012","https://openalex.org/W1539042579","https://openalex.org/W1608762865","https://openalex.org/W1658959288","https://openalex.org/W1963105592","https://openalex.org/W1981555606","https://openalex.org/W1995871244","https://openalex.org/W2000171858","https://openalex.org/W2014929493","https://openalex.org/W2061611022","https://openalex.org/W2080284304","https://openalex.org/W2115255494","https://openalex.org/W2124874986","https://openalex.org/W2130351941","https://openalex.org/W2169212403","https://openalex.org/W2252439461","https://openalex.org/W2404886994","https://openalex.org/W6636146224"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2096938998","https://openalex.org/W1760305469"],"abstract_inverted_index":{"Physically":[0],"Unclonable":[1],"Functions":[2],"(PUFs)":[3],"based":[4],"on":[5,42],"the":[6,14,45],"evaluation":[7],"of":[8,13,49,64,76],"uninitialized":[9],"SRAM":[10],"are":[11,39],"one":[12],"most":[15],"promising":[16],"PUF":[17],"candidates":[18],"to":[19,25,60],"date.":[20],"However,":[21],"transferring":[22],"their":[23,72],"concept":[24],"Xilinx":[26,66],"FPGAs":[27,38,67],"is":[28],"not":[29],"straightforward":[30],"since":[31],"all":[32],"SRAM-based":[33],"block":[34,62],"memories":[35,63],"in":[36],"these":[37],"automatically":[40],"cleared":[41],"power-up,":[43],"destroying":[44],"desired":[46],"initial":[47],"bits":[48],"information.":[50],"In":[51],"this":[52],"work":[53],"we":[54],"therefore":[55],"propose":[56],"a":[57],"novel":[58],"strategy":[59],"convert":[61],"28nm":[65],"into":[68],"SRAM-PUFs":[69],"by":[70],"exploiting":[71],"recently":[73],"introduced":[74],"feature":[75],"power-gating":[77],"and":[78],"partial":[79],"reconfiguration.":[80]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}