{"id":"https://openalex.org/W1985447691","doi":"https://doi.org/10.1109/fpl.2013.6645554","title":"FPGA based hardware-software co-designed dynamic binary translation system","display_name":"FPGA based hardware-software co-designed dynamic binary translation system","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W1985447691","doi":"https://doi.org/10.1109/fpl.2013.6645554","mag":"1985447691"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2013.6645554","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2013.6645554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 23rd International Conference on Field programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101953376","display_name":"Yuan Yao","orcid":"https://orcid.org/0000-0001-7479-9263"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yuan Yao","raw_affiliation_strings":["Department of Computer Science, Zhejiang University, Hangzhou, China","Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030123185","display_name":"Zhongyong Lu","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhongyong Lu","raw_affiliation_strings":["Department of Computer Science, Zhejiang University, Hangzhou, China","Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071291931","display_name":"Qingsong Shi","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qingsong Shi","raw_affiliation_strings":["Department of Computer Science, Zhejiang University, Hangzhou, China","Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101562847","display_name":"Wenzhi Chen","orcid":"https://orcid.org/0000-0003-1674-4701"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Wenzhi Chen","raw_affiliation_strings":["Department of Computer Science, Zhejiang University, Hangzhou, China","Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China","institution_ids":["https://openalex.org/I76130692"]},{"raw_affiliation_string":"Department of Computer Science, Zhejiang University, Hangzhou, China#TAB#","institution_ids":["https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5101953376"],"corresponding_institution_ids":["https://openalex.org/I76130692"],"apc_list":null,"apc_paid":null,"fwci":0.6304,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.67958218,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/binary-translation","display_name":"Binary translation","score":0.8970712423324585},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8304662108421326},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7451742887496948},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.540455162525177},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.525451123714447},{"id":"https://openalex.org/keywords/control-flow","display_name":"Control flow","score":0.45308318734169006},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.44004976749420166},{"id":"https://openalex.org/keywords/context-switch","display_name":"Context switch","score":0.43254974484443665},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.41761866211891174},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4011852741241455},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.37484705448150635},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25935953855514526},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1323871612548828}],"concepts":[{"id":"https://openalex.org/C2778971978","wikidata":"https://www.wikidata.org/wiki/Q2287075","display_name":"Binary translation","level":3,"score":0.8970712423324585},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8304662108421326},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7451742887496948},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.540455162525177},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.525451123714447},{"id":"https://openalex.org/C160191386","wikidata":"https://www.wikidata.org/wiki/Q868299","display_name":"Control flow","level":2,"score":0.45308318734169006},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.44004976749420166},{"id":"https://openalex.org/C53833338","wikidata":"https://www.wikidata.org/wiki/Q1061424","display_name":"Context switch","level":2,"score":0.43254974484443665},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.41761866211891174},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4011852741241455},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.37484705448150635},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25935953855514526},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1323871612548828},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2013.6645554","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2013.6645554","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 23rd International Conference on Field programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1686420892","https://openalex.org/W2027904017","https://openalex.org/W2043398903","https://openalex.org/W2072737419","https://openalex.org/W2073155186","https://openalex.org/W2098580739","https://openalex.org/W2108470968","https://openalex.org/W2122963045","https://openalex.org/W2150023094","https://openalex.org/W4231002400","https://openalex.org/W4232751114","https://openalex.org/W4237444170"],"related_works":["https://openalex.org/W1976377428","https://openalex.org/W4254109928","https://openalex.org/W2963356946","https://openalex.org/W2150023094","https://openalex.org/W1996050943","https://openalex.org/W2034592155","https://openalex.org/W2356878786","https://openalex.org/W4236526691","https://openalex.org/W4200016955","https://openalex.org/W2003690377"],"abstract_inverted_index":{"Binary":[0],"translation":[1,28,41,57],"is":[2,132],"used":[3],"to":[4,13,88,98,110],"allow":[5],"applications":[6],"of":[7,34,68,102,142,146,148],"one":[8],"instruction":[9],"set":[10],"architecture":[11],"(ISA)":[12],"run":[14],"on":[15,121],"another,":[16],"thereby":[17],"maintaining":[18],"the":[19,90,100,119,128,135],"binary":[20,27,56],"level":[21,67],"compatibility":[22],"across":[23],"ISAs.":[24],"Conventional":[25],"software":[26],"systems":[29],"suffer":[30],"performance":[31,112,130],"loss":[32,113],"because":[33],"architectural":[35,91],"heterogeneity":[36],"amongst":[37],"ISAs,":[38],"control":[39,103],"flow":[40,104],"and":[42,83,106,144],"context":[43,115],"switches.":[44,116],"In":[45,71],"this":[46],"paper,":[47],"we":[48,75],"propose":[49,76],"an":[50],"FPGA":[51],"based":[52],"hardware-software":[53],"co-designed":[54],"dynamic":[55],"(DBT)":[58],"system,":[59,74],"which":[60],"moderates":[61],"these":[62],"issues":[63],"at":[64],"a":[65,77,84,93,107],"low":[66],"hardware":[69,94],"cost.":[70],"our":[72],"DBT":[73],"MIPS":[78],"condition":[79],"code":[80],"flags":[81],"register":[82],"modest":[85],"ISA":[86],"extension":[87],"bridge":[89],"gap,":[92],"address":[95],"mapping":[96],"mechanism":[97],"accelerate":[99],"handling":[101],"instructions,":[105],"scratchpad":[108],"memory":[109],"reduce":[111],"during":[114],"We":[117],"implement":[118],"system":[120],"Xilinx":[122,149],"XC5VLX110T.":[123],"Quantitative":[124],"experiments":[125],"reveal":[126],"that":[127],"overall":[129],"improvement":[131],"56.1%":[133],"over":[134],"baseline":[136],"configuration,":[137],"with":[138],"only":[139],"extra":[140],"1.4%":[141],"slices":[143],"5.4%":[145],"BRAMs":[147],"XC5VLX110T":[150],"occupied.":[151]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
