{"id":"https://openalex.org/W1974866421","doi":"https://doi.org/10.1109/fpl.2013.6645531","title":"Iterative floating point computation using FPGA DSP blocks","display_name":"Iterative floating point computation using FPGA DSP blocks","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W1974866421","doi":"https://doi.org/10.1109/fpl.2013.6645531","mag":"1974866421"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2013.6645531","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2013.6645531","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 23rd International Conference on Field programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024049317","display_name":"Fredrik Brosser","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Fredrik Brosser","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036164080","display_name":"Hui Yan Cheah","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Hui Yan Cheah","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032556461","display_name":"Suhaib A. Fahmy","orcid":"https://orcid.org/0000-0003-0568-5048"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Suhaib A. Fahmy","raw_affiliation_strings":["School of Computer Engineering, Nanyang Technological University, Singapore","Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore"],"affiliations":[{"raw_affiliation_string":"School of Computer Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"Sch. of Comput. Eng., Nanyang Technol. Univ., Singapore, , Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5024049317"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":2.2191,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.87186788,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7565655708312988},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7274342179298401},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.7143893241882324},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6694749593734741},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5493825674057007},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.5326069593429565},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5049067139625549},{"id":"https://openalex.org/keywords/ieee-floating-point","display_name":"IEEE floating point","score":0.47325044870376587},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.44710877537727356},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4285498261451721},{"id":"https://openalex.org/keywords/multiplication","display_name":"Multiplication (music)","score":0.4233362674713135},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.41502365469932556},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37460950016975403},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2010033130645752},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09450185298919678}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7565655708312988},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7274342179298401},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.7143893241882324},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6694749593734741},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5493825674057007},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.5326069593429565},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5049067139625549},{"id":"https://openalex.org/C137231763","wikidata":"https://www.wikidata.org/wiki/Q828287","display_name":"IEEE floating point","level":3,"score":0.47325044870376587},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.44710877537727356},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4285498261451721},{"id":"https://openalex.org/C2780595030","wikidata":"https://www.wikidata.org/wiki/Q3860309","display_name":"Multiplication (music)","level":2,"score":0.4233362674713135},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.41502365469932556},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37460950016975403},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2010033130645752},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09450185298919678},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2013.6645531","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2013.6645531","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 23rd International Conference on Field programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.703.3437","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.703.3437","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ntu.edu.sg/home/sfahmy/files/papers/fpl2013-brosser.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1944989747","https://openalex.org/W2023406772","https://openalex.org/W2025500963","https://openalex.org/W2030898836","https://openalex.org/W2074741366","https://openalex.org/W2085612442","https://openalex.org/W2118663079","https://openalex.org/W2130425801","https://openalex.org/W2171948637","https://openalex.org/W2207050309"],"related_works":["https://openalex.org/W2366554144","https://openalex.org/W2382457518","https://openalex.org/W2151743818","https://openalex.org/W2596474508","https://openalex.org/W3193325075","https://openalex.org/W2003435315","https://openalex.org/W2024574431","https://openalex.org/W1573821047","https://openalex.org/W3133934505","https://openalex.org/W1974866421"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,67,101],"single":[4,68],"precision":[5],"floating":[6,54,113],"point":[7,55,114],"unit":[8],"design":[9,19],"for":[10,44,134],"multiplication":[11,56],"and":[12,29,42,57,71,75,80,109],"addition/subtraction":[13],"using":[14],"FPGA":[15,95,107],"DSP":[16,69,77,132],"blocks.":[17],"The":[18],"is":[20],"based":[21,96],"around":[22],"the":[23,36,47,85,104,123],"DSP48E1":[24,37],"primitive":[25],"found":[26],"in":[27,50,110,120],"Virtex-6":[28],"all":[30],"7-series":[31],"FPGAs":[32],"from":[33],"Xilinx.":[34],"Since":[35,94],"can":[38,136],"be":[39,118,138],"dynamically":[40],"configured":[41],"used":[43],"many":[45],"of":[46,103],"sub-operations":[48],"involved":[49],"IEEE":[51],"754-2008":[52],"binary32":[53],"addition,":[58],"we":[59],"demonstrate":[60],"an":[61,127],"iterative":[62,124],"combined":[63],"operator":[64],"that":[65],"uses":[66],"block":[70,78],"minimal":[72],"logic.":[73],"Logic-only":[74],"fixed-configuration":[76],"designs,":[79],"other":[81],"state-of-the-art":[82],"implementations,":[83],"including":[84],"Xilinx":[86],"CoreGen":[87],"operators":[88],"are":[89],"compared":[90],"to":[91,130],"this":[92],"approach.":[93],"systems":[97],"typically":[98],"run":[99],"at":[100],"fraction":[102],"maximum":[105],"possible":[106],"speed,":[108],"some":[111],"cases,":[112],"computations":[115],"may":[116],"not":[117],"required":[119],"every":[121],"cycle,":[122],"approach":[125],"represents":[126],"efficient":[128],"way":[129],"leverage":[131],"resources":[133],"what":[135],"otherwise":[137],"costly":[139],"operations.":[140]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}