{"id":"https://openalex.org/W2017517691","doi":"https://doi.org/10.1109/fpl.2013.6645516","title":"Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS","display_name":"Efficient implementation of Virtual Coarse Grained Reconfigurable Arrays on FPGAS","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W2017517691","doi":"https://doi.org/10.1109/fpl.2013.6645516","mag":"2017517691"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2013.6645516","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2013.6645516","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 23rd International Conference on Field programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020622964","display_name":"Karel Heyse","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":true,"raw_author_name":"Karel Heyse","raw_affiliation_strings":["ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","ELIS Dept., Ghent Univ., Ghent, Belgium"],"affiliations":[{"raw_affiliation_string":"ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"ELIS Dept., Ghent Univ., Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074378105","display_name":"Tom Davidson","orcid":"https://orcid.org/0000-0001-8059-6235"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Tom Davidson","raw_affiliation_strings":["ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","ELIS Dept., Ghent Univ., Ghent, Belgium"],"affiliations":[{"raw_affiliation_string":"ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"ELIS Dept., Ghent Univ., Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073897749","display_name":"Elias Vansteenkiste","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Elias Vansteenkiste","raw_affiliation_strings":["ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","ELIS Dept., Ghent Univ., Ghent, Belgium"],"affiliations":[{"raw_affiliation_string":"ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"ELIS Dept., Ghent Univ., Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053420008","display_name":"Karel Bruneel","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Karel Bruneel","raw_affiliation_strings":["ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","ELIS Dept., Ghent Univ., Ghent, Belgium"],"affiliations":[{"raw_affiliation_string":"ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"ELIS Dept., Ghent Univ., Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004502321","display_name":"Dirk Stroobandt","orcid":"https://orcid.org/0000-0002-4477-5313"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dirk Stroobandt","raw_affiliation_strings":["ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","ELIS Dept., Ghent Univ., Ghent, Belgium"],"affiliations":[{"raw_affiliation_string":"ELIS department, Computer Systems Laboratory, Ghent University, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"ELIS Dept., Ghent Univ., Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5020622964"],"corresponding_institution_ids":["https://openalex.org/I32597200"],"apc_list":null,"apc_paid":null,"fwci":3.1521,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.91590037,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.907810628414154},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8243358731269836},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.7154635787010193},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.67821204662323},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5799852609634399},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5291365385055542},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4955860376358032},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49341264367103577},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49158748984336853},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4342661201953888},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07615157961845398}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.907810628414154},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8243358731269836},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.7154635787010193},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.67821204662323},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5799852609634399},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5291365385055542},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4955860376358032},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49341264367103577},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49158748984336853},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4342661201953888},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07615157961845398},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2013.6645516","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2013.6645516","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 23rd International Conference on Field programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"pmh:oai:archive.ugent.be:4199215","is_oa":false,"landing_page_url":"http://hdl.handle.net/1854/LU-4199215","pdf_url":null,"source":{"id":"https://openalex.org/S4306400478","display_name":"Ghent University Academic Bibliography (Ghent University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I32597200","host_organization_name":"Ghent University","host_organization_lineage":["https://openalex.org/I32597200"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISBN: 9781479900046","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5899999737739563,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W105298322","https://openalex.org/W1523051745","https://openalex.org/W1572929635","https://openalex.org/W1954572403","https://openalex.org/W2019462857","https://openalex.org/W2048944807","https://openalex.org/W2076375531","https://openalex.org/W2090193813","https://openalex.org/W2121563494","https://openalex.org/W2132997358","https://openalex.org/W2136150677","https://openalex.org/W2137708693","https://openalex.org/W2166709631","https://openalex.org/W2554510265"],"related_works":["https://openalex.org/W2117300767","https://openalex.org/W2024574431","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441","https://openalex.org/W1612076744","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W2139962137","https://openalex.org/W2126857316"],"abstract_inverted_index":{"Fine":[0],"grained":[1],"Field":[2],"Programmable":[3],"Gate":[4],"Arrays":[5,26],"(FPGA)":[6],"are":[7],"complex":[8],"to":[9,49],"program":[10],"and":[11,56,92,110],"therefore":[12],"suffer":[13],"from":[14],"high":[15],"development":[16],"costs.":[17],"To":[18],"solve":[19],"this":[20,67,98,115],"problem,":[21],"Virtual":[22],"Coarse":[23],"Grained":[24],"Reconfigurable":[25],"(Virtual":[27],"CGRA),":[28],"or":[29],"CGRAs":[30],"implemented":[31],"on":[32,82],"FPGAs,":[33],"have":[34],"been":[35],"proposed.":[36],"Conventional":[37],"implementations":[38],"of":[39,114,123],"VCGRAs":[40],"use":[41],"functional":[42],"FPGA":[43,85,108],"resources,":[44],"such":[45,87],"as":[46,88],"LookUp":[47],"Tables,":[48],"implement":[50],"the":[51,61,103,112],"virtual":[52],"switch":[53,90],"blocks,":[54],"registers":[55],"other":[57],"components":[58,80],"that":[59,66,72,119],"make":[60],"VCGRA":[62,129],"configurable.":[63],"We":[64,95],"show":[65,96],"is":[68,125],"a":[69,128],"large":[70],"overhead":[71],"can":[73,99],"often":[74],"be":[75,100],"avoided":[76],"by":[77,117],"mapping":[78],"these":[79],"directly":[81],"lower":[83],"level":[84],"resources":[86],"physical":[89],"blocks":[91],"configuration":[93],"memory.":[94],"how":[97],"achieved":[101],"using":[102],"tool":[104],"flow":[105],"for":[106,127],"parameterised":[107],"configurations":[109],"illustrate":[111],"advantages":[113],"method":[116],"showing":[118],"an":[120],"area":[121],"reduction":[122],"50%":[124],"attainable":[126],"aimed":[130],"at":[131],"regular":[132],"expression":[133],"matching.":[134]},"counts_by_year":[{"year":2022,"cited_by_count":3},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
