{"id":"https://openalex.org/W1989709288","doi":"https://doi.org/10.1109/fpl.2012.6339223","title":"Automatically exploiting regularity in applications to reduce reconfiguration memory requirements","display_name":"Automatically exploiting regularity in applications to reduce reconfiguration memory requirements","publication_year":2012,"publication_date":"2012-08-01","ids":{"openalex":"https://openalex.org/W1989709288","doi":"https://doi.org/10.1109/fpl.2012.6339223","mag":"1989709288"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2012.6339223","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2012.6339223","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027746550","display_name":"Fatma Abouelella","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":true,"raw_author_name":"Fatma Abouelella","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University IBBT, Ghent, Belgium","Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, B-9000, Belgium"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University IBBT, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, B-9000, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053420008","display_name":"Karel Bruneel","orcid":null},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Karel Bruneel","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University IBBT, Ghent, Belgium","Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, B-9000, Belgium"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University IBBT, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, B-9000, Belgium","institution_ids":["https://openalex.org/I32597200"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004502321","display_name":"Dirk Stroobandt","orcid":"https://orcid.org/0000-0002-4477-5313"},"institutions":[{"id":"https://openalex.org/I32597200","display_name":"Ghent University","ror":"https://ror.org/00cv9y106","country_code":"BE","type":"education","lineage":["https://openalex.org/I32597200"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Dirk Stroobandt","raw_affiliation_strings":["Department of Electronics and Information Systems, Ghent University IBBT, Ghent, Belgium","Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, B-9000, Belgium"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University IBBT, Ghent, Belgium","institution_ids":["https://openalex.org/I32597200"]},{"raw_affiliation_string":"Department of Electronics and Information Systems, Ghent University, Sint-Pietersnieuwstraat 41, B-9000, Belgium","institution_ids":["https://openalex.org/I32597200"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5027746550"],"corresponding_institution_ids":["https://openalex.org/I32597200"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.06349127,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"307","last_page":"314"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9301556348800659},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7958409786224365},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6667351722717285},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.604046106338501},{"id":"https://openalex.org/keywords/parameterized-complexity","display_name":"Parameterized complexity","score":0.5863262414932251},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.550679087638855},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5298290848731995},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5256767868995667},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5057651996612549},{"id":"https://openalex.org/keywords/auxiliary-memory","display_name":"Auxiliary memory","score":0.45954838395118713},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42766374349594116},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.35561317205429077},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31191176176071167},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1686084270477295},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.12640872597694397}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9301556348800659},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7958409786224365},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6667351722717285},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.604046106338501},{"id":"https://openalex.org/C165464430","wikidata":"https://www.wikidata.org/wiki/Q1570441","display_name":"Parameterized complexity","level":2,"score":0.5863262414932251},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.550679087638855},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5298290848731995},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5256767868995667},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5057651996612549},{"id":"https://openalex.org/C82687282","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Auxiliary memory","level":2,"score":0.45954838395118713},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42766374349594116},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35561317205429077},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31191176176071167},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1686084270477295},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.12640872597694397},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2012.6339223","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2012.6339223","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"22nd International Conference on Field Programmable Logic and Applications (FPL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W2062143991","https://openalex.org/W2099132653","https://openalex.org/W2105531498","https://openalex.org/W2118638759","https://openalex.org/W2122483184","https://openalex.org/W2134387601","https://openalex.org/W2160367103","https://openalex.org/W2171549192","https://openalex.org/W2297943345","https://openalex.org/W2312290211","https://openalex.org/W2532244949","https://openalex.org/W4243490088","https://openalex.org/W6680164963","https://openalex.org/W6698802624"],"related_works":["https://openalex.org/W2051058708","https://openalex.org/W1981002473","https://openalex.org/W2357657342","https://openalex.org/W1494268238","https://openalex.org/W154868527","https://openalex.org/W1983207144","https://openalex.org/W2490706771","https://openalex.org/W2480116122","https://openalex.org/W2952056231","https://openalex.org/W2481000617"],"abstract_inverted_index":{"Partial":[0],"reconfiguration":[1,30,125],"(PR)":[2],"of":[3,36,41,48,134],"FPGAs":[4],"is":[5,97,139,154],"a":[6,66,104,131,160,165],"very":[7],"promising":[8],"technique.":[9,51],"Applications":[10],"implemented":[11],"with":[12],"PR":[13,50,56],"are":[14,21],"smaller":[15],"and":[16,65,119,137,164],"faster":[17],"than":[18],"applications":[19,76,180],"that":[20,69,110,130],"not":[22],"reconfigured.":[23],"However,":[24],"the":[25,29,34,39,45,49,55,82,88,107,116,124,142,148,152],"overhead":[26],"emerging":[27],"from":[28],"process":[31],"can":[32,91],"nullify":[33],"benefits":[35],"PR.":[37],"Moreover,":[38],"lack":[40],"automatic":[42],"tools":[43],"hinders":[44],"widespread":[46],"use":[47],"In":[52,99],"previous":[53],"work,":[54],"barriers":[57],"have":[58],"been":[59],"tackled":[60],"by":[61],"introducing":[62],"parameterized":[63,89,149],"configurations":[64],"tool":[67,80,108],"flow":[68,109],"exploits":[70],"these":[71],"configurations.":[72],"For":[73],"regularly":[74],"structured":[75],"mapped":[77],"through":[78],"this":[79,100],"flow,":[81],"memory":[83,143],"resources":[84,144],"needed":[85,145],"to":[86,106,146],"store":[87,147],"configuration":[90,150],"be":[92,176],"significantly":[93],"reduced":[94],"when":[95,151,179],"regularity":[96,153],"exploited.":[98],"paper,":[101],"we":[102],"propose":[103],"front-end":[105],"automatically":[111],"detects":[112],"regular":[113,161],"structures":[114],"at":[115],"HDL":[117],"level":[118],"transfers":[120],"those":[121],"regularities":[122],"into":[123],"process.":[126],"The":[127,172],"results":[128],"show":[129],"reduction":[132,173],"factor":[133,174],"76,":[135],"10":[136],"167":[138],"achieved":[140],"in":[141],"exploited":[155],"for":[156],"an":[157],"adaptive":[158],"FIR,":[159],"expression":[162],"matcher":[163],"Ternary":[166],"Content":[167],"Addressable":[168],"Memory":[169],"(TCAM)":[170],"respectively.":[171],"will":[175],"further":[177],"increased":[178],"scale.":[181]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
