{"id":"https://openalex.org/W2020424968","doi":"https://doi.org/10.1109/fpl.2009.5272502","title":"Bitstream compression through frame removal and partial reconfiguration","display_name":"Bitstream compression through frame removal and partial reconfiguration","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W2020424968","doi":"https://doi.org/10.1109/fpl.2009.5272502","mag":"2020424968"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2009.5272502","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272502","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013701577","display_name":"Benjamin Sellers","orcid":null},"institutions":[{"id":"https://openalex.org/I100005738","display_name":"Brigham Young University","ror":"https://ror.org/047rhhm47","country_code":"US","type":"education","lineage":["https://openalex.org/I100005738"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Benjamin Sellers","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","Dept. of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017900734","display_name":"Jonathan Heiner","orcid":null},"institutions":[{"id":"https://openalex.org/I100005738","display_name":"Brigham Young University","ror":"https://ror.org/047rhhm47","country_code":"US","type":"education","lineage":["https://openalex.org/I100005738"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jonathan Heiner","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","Dept. of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041342112","display_name":"Michael Wirthlin","orcid":"https://orcid.org/0000-0003-0328-6713"},"institutions":[{"id":"https://openalex.org/I100005738","display_name":"Brigham Young University","ror":"https://ror.org/047rhhm47","country_code":"US","type":"education","lineage":["https://openalex.org/I100005738"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Michael Wirthlin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","Dept. of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]},{"raw_affiliation_string":"Dept. of Electrical and Computer Engineering, Brigham Young University, Provo, UT, USA","institution_ids":["https://openalex.org/I100005738"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035533443","display_name":"Jeff Kalb","orcid":null},"institutions":[{"id":"https://openalex.org/I4210104735","display_name":"Sandia National Laboratories","ror":"https://ror.org/01apwpt12","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I198811213","https://openalex.org/I4210104735"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeff Kalb","raw_affiliation_strings":["Wireless and Event Sensing Applications, Sandia National Laboratories, Albuquerque, NM, USA"],"affiliations":[{"raw_affiliation_string":"Wireless and Event Sensing Applications, Sandia National Laboratories, Albuquerque, NM, USA","institution_ids":["https://openalex.org/I4210104735"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5013701577"],"corresponding_institution_ids":["https://openalex.org/I100005738"],"apc_list":null,"apc_paid":null,"fwci":1.5829,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.83404045,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"476","last_page":"480"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.8389596939086914},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7995089888572693},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7965214252471924},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7179979085922241},{"id":"https://openalex.org/keywords/initialization","display_name":"Initialization","score":0.5650463104248047},{"id":"https://openalex.org/keywords/data-compression","display_name":"Data compression","score":0.5398174524307251},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5237712264060974},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5124967098236084},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.500756025314331},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.4792520999908447},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.4128556251525879},{"id":"https://openalex.org/keywords/image-compression","display_name":"Image compression","score":0.4123910367488861},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.31591856479644775},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1362701654434204},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.10749951004981995},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07559174299240112}],"concepts":[{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.8389596939086914},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7995089888572693},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7965214252471924},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7179979085922241},{"id":"https://openalex.org/C114466953","wikidata":"https://www.wikidata.org/wiki/Q6034165","display_name":"Initialization","level":2,"score":0.5650463104248047},{"id":"https://openalex.org/C78548338","wikidata":"https://www.wikidata.org/wiki/Q2493","display_name":"Data compression","level":2,"score":0.5398174524307251},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5237712264060974},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5124967098236084},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.500756025314331},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.4792520999908447},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.4128556251525879},{"id":"https://openalex.org/C13481523","wikidata":"https://www.wikidata.org/wiki/Q412438","display_name":"Image compression","level":4,"score":0.4123910367488861},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.31591856479644775},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1362701654434204},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.10749951004981995},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07559174299240112},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2009.5272502","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272502","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6299999952316284,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1547315652","https://openalex.org/W2109802898","https://openalex.org/W2159959433","https://openalex.org/W6632502156","https://openalex.org/W6683359209"],"related_works":["https://openalex.org/W2399954712","https://openalex.org/W2096663586","https://openalex.org/W2073686524","https://openalex.org/W2901561495","https://openalex.org/W634170220","https://openalex.org/W2365896259","https://openalex.org/W2612354329","https://openalex.org/W2390134136","https://openalex.org/W1964899920","https://openalex.org/W2901447072"],"abstract_inverted_index":{"As":[0],"FPGA":[1],"logic":[2,100],"density":[3],"continues":[4],"to":[5,11,58],"increase,":[6],"new":[7],"techniques":[8],"are":[9],"needed":[10],"store":[12],"initial":[13],"configuration":[14],"data":[15],"efficiently,":[16],"maintain":[17],"usability,":[18],"and":[19,44,69,94,135],"minimize":[20],"cost.":[21],"In":[22],"this":[23,112],"paper,":[24],"a":[25,48,60,67,107,114],"novel":[26],"compression":[27,51,118,128,136],"technique":[28,38,54,129],"is":[29,79,101],"presented":[30],"for":[31,96,123],"Xilinx":[32],"Virtex":[33],"partially":[34],"reconfigurable":[35],"FPGAs.":[36],"This":[37,53,86,127],"relies":[39],"on":[40],"constrained":[41],"hardware":[42,61],"design":[43,62],"layout":[45],"combined":[46],"with":[47],"few":[49],"simple":[50],"techniques.":[52],"uses":[55],"partial":[56,70,104],"reconfiguration":[57,105],"separate":[59,65],"into":[63],"two":[64],"regions:":[66],"static":[68,77],"region.":[71],"A":[72],"bitstream":[73,87],"containing":[74],"only":[75],"the":[76,124],"region":[78],"then":[80],"compressed":[81],"by":[82],"removing":[83],"empty":[84],"frames.":[85],"will":[88],"be":[89],"stored":[90],"in":[91],"non-volatile":[92],"memory":[93],"used":[95],"initialization.":[97],"The":[98],"remaining":[99],"configured":[102],"through":[103],"over":[106],"communication":[108],"network.":[109],"By":[110],"applying":[111],"technique,":[113],"high":[115],"level":[116],"of":[117],"was":[119],"achieved":[120],"(almost":[121],"90%":[122],"V4":[125],"LX25).":[126],"requires":[130],"no":[131],"extra":[132],"decompression":[133],"circuitry":[134],"levels":[137],"improve":[138],"as":[139],"device":[140],"size":[141],"increases.":[142]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}