{"id":"https://openalex.org/W2043986253","doi":"https://doi.org/10.1109/fpl.2009.5272377","title":"Synthesis of the SR programming language for complex FPGAs","display_name":"Synthesis of the SR programming language for complex FPGAs","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W2043986253","doi":"https://doi.org/10.1109/fpl.2009.5272377","mag":"2043986253"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2009.5272377","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272377","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015890192","display_name":"Nick Gasson","orcid":null},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Nick Gasson","raw_affiliation_strings":["Department Computer Science, University of York, York, UK","Dept. Computer Science, University of York, UK"],"affiliations":[{"raw_affiliation_string":"Department Computer Science, University of York, York, UK","institution_ids":["https://openalex.org/I52099693"]},{"raw_affiliation_string":"Dept. Computer Science, University of York, UK","institution_ids":["https://openalex.org/I52099693"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5086605034","display_name":"Neil Audsley","orcid":"https://orcid.org/0000-0003-3739-6590"},"institutions":[{"id":"https://openalex.org/I52099693","display_name":"University of York","ror":"https://ror.org/04m01e293","country_code":"GB","type":"education","lineage":["https://openalex.org/I52099693"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Neil Audsley","raw_affiliation_strings":["Department Computer Science, University of York, York, UK","Dept. Computer Science, University of York, UK"],"affiliations":[{"raw_affiliation_string":"Department Computer Science, University of York, York, UK","institution_ids":["https://openalex.org/I52099693"]},{"raw_affiliation_string":"Dept. Computer Science, University of York, UK","institution_ids":["https://openalex.org/I52099693"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5015890192"],"corresponding_institution_ids":["https://openalex.org/I52099693"],"apc_list":null,"apc_paid":null,"fwci":0.5276,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.66127282,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"99","issue":null,"first_page":"617","last_page":"621"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8398109674453735},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8366690278053284},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5863306522369385},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.568403422832489},{"id":"https://openalex.org/keywords/concurrency","display_name":"Concurrency","score":0.5668251514434814},{"id":"https://openalex.org/keywords/class","display_name":"Class (philosophy)","score":0.5310108065605164},{"id":"https://openalex.org/keywords/high-level-programming-language","display_name":"High-level programming language","score":0.5185416340827942},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.5157082676887512},{"id":"https://openalex.org/keywords/variety","display_name":"Variety (cybernetics)","score":0.5053775906562805},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.47516363859176636},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4533091187477112},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41077589988708496},{"id":"https://openalex.org/keywords/programming-paradigm","display_name":"Programming paradigm","score":0.24098947644233704},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.0979052484035492}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8398109674453735},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8366690278053284},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5863306522369385},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.568403422832489},{"id":"https://openalex.org/C193702766","wikidata":"https://www.wikidata.org/wiki/Q1414548","display_name":"Concurrency","level":2,"score":0.5668251514434814},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.5310108065605164},{"id":"https://openalex.org/C19024347","wikidata":"https://www.wikidata.org/wiki/Q211496","display_name":"High-level programming language","level":3,"score":0.5185416340827942},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.5157082676887512},{"id":"https://openalex.org/C136197465","wikidata":"https://www.wikidata.org/wiki/Q1729295","display_name":"Variety (cybernetics)","level":2,"score":0.5053775906562805},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.47516363859176636},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4533091187477112},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41077589988708496},{"id":"https://openalex.org/C34165917","wikidata":"https://www.wikidata.org/wiki/Q188267","display_name":"Programming paradigm","level":2,"score":0.24098947644233704},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0979052484035492}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2009.5272377","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272377","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W156334619","https://openalex.org/W1568970091","https://openalex.org/W1589360997","https://openalex.org/W2103581911","https://openalex.org/W2112432448","https://openalex.org/W2122712122","https://openalex.org/W2129578519","https://openalex.org/W6606392607","https://openalex.org/W6634142394"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2045183646","https://openalex.org/W2162409446","https://openalex.org/W2355315220","https://openalex.org/W2974157558","https://openalex.org/W4387237598","https://openalex.org/W2487895676","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506"],"abstract_inverted_index":{"Most":[0],"existing":[1],"approaches":[2],"to":[3,7,13,20,80],"targeting":[4],"high-level":[5,59],"software":[6,52],"FPGAs":[8],"are":[9],"based":[10],"on":[11,70],"extensions":[12],"C":[14],"and":[15,23,32,58,73,92],"do":[16],"not":[17],"map":[18],"easily":[19],"the":[21,63],"features":[22],"characteristics":[24],"of":[25,35,49],"modern":[26],"FPGAs.":[27],"These":[28],"include":[29],"massive":[30],"parallelism":[31],"a":[33,46,51,77,87,98],"variety":[34],"complex":[36],"IP-blocks":[37],"(eg.":[38],"RAMs,":[39],"DSPs).":[40],"In":[41],"this":[42],"paper":[43],"we":[44],"discuss":[45],"hardware":[47],"implementation":[48],"SR,":[50],"language":[53,64],"with":[54],"first":[55],"class":[56],"concurrency":[57],"IPC.We":[60],"show":[61],"that":[62,74],"model":[65],"can":[66],"be":[67],"implemented":[68],"efficiently":[69],"an":[71],"FPGA,":[72],"it":[75],"provides":[76],"natural":[78],"means":[79],"encapsulate":[81],"FPGA":[82],"resources.":[83],"We":[84],"compare":[85],"against":[86],"commercial":[88],"C-based":[89],"synthesis":[90],"tool":[91],"achieve":[93],"similar":[94],"resource":[95],"usage":[96],"using":[97],"more":[99],"expressive":[100],"language.":[101]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}