{"id":"https://openalex.org/W1991189698","doi":"https://doi.org/10.1109/fpl.2009.5272306","title":"A comparison of FPGA and FPAA technologies for a signal processing application","display_name":"A comparison of FPGA and FPAA technologies for a signal processing application","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W1991189698","doi":"https://doi.org/10.1109/fpl.2009.5272306","mag":"1991189698"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2009.5272306","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272306","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007864694","display_name":"Roberto Selow","orcid":null},"institutions":[{"id":"https://openalex.org/I75619284","display_name":"Universidade Positivo","ror":"https://ror.org/02d09a271","country_code":"BR","type":"education","lineage":["https://openalex.org/I75619284"]}],"countries":["BR"],"is_corresponding":true,"raw_author_name":"Roberto Selow","raw_affiliation_strings":["Departamento de Engenharia El\u00e9trica, Universidade Positivo, Curitiba, Parana, Brazil","Departamento de Engenharia El\u00e9trica, Universidade Positivo, Rua Prof. Pedro Viriato P. de Souza, 5300 - 81280-330 - Curitiba (PR) - Brazil"],"affiliations":[{"raw_affiliation_string":"Departamento de Engenharia El\u00e9trica, Universidade Positivo, Curitiba, Parana, Brazil","institution_ids":["https://openalex.org/I75619284"]},{"raw_affiliation_string":"Departamento de Engenharia El\u00e9trica, Universidade Positivo, Rua Prof. Pedro Viriato P. de Souza, 5300 - 81280-330 - Curitiba (PR) - Brazil","institution_ids":["https://openalex.org/I75619284"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019757557","display_name":"Heitor Silv\u00e9rio Lopes","orcid":"https://orcid.org/0000-0003-3984-1432"},"institutions":[{"id":"https://openalex.org/I1283613182","display_name":"Universidade Tecnol\u00f3gica Federal do Paran\u00e1","ror":"https://ror.org/002v2kq79","country_code":"BR","type":"education","lineage":["https://openalex.org/I1283613182"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Heitor S. Lopes","raw_affiliation_strings":["Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Curitiba, Parana, Brazil","Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Avenida 7 de Setembro, 3165-80230-901 - Curitiba (PR) - Brazil"],"affiliations":[{"raw_affiliation_string":"Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Curitiba, Parana, Brazil","institution_ids":["https://openalex.org/I1283613182"]},{"raw_affiliation_string":"Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Avenida 7 de Setembro, 3165-80230-901 - Curitiba (PR) - Brazil","institution_ids":["https://openalex.org/I1283613182"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5018546513","display_name":"Carlos R. Erig Lima","orcid":"https://orcid.org/0000-0002-4026-4444"},"institutions":[{"id":"https://openalex.org/I1283613182","display_name":"Universidade Tecnol\u00f3gica Federal do Paran\u00e1","ror":"https://ror.org/002v2kq79","country_code":"BR","type":"education","lineage":["https://openalex.org/I1283613182"]}],"countries":["BR"],"is_corresponding":false,"raw_author_name":"Carlos R. Erig Lima","raw_affiliation_strings":["Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Curitiba, Parana, Brazil","Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Avenida 7 de Setembro, 3165-80230-901 - Curitiba (PR) - Brazil"],"affiliations":[{"raw_affiliation_string":"Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Curitiba, Parana, Brazil","institution_ids":["https://openalex.org/I1283613182"]},{"raw_affiliation_string":"Departamento de Eletr\u00f4nica, Universidade Tecnol\u00f3gica Federal do Paran\u00e1, Avenida 7 de Setembro, 3165-80230-901 - Curitiba (PR) - Brazil","institution_ids":["https://openalex.org/I1283613182"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5007864694"],"corresponding_institution_ids":["https://openalex.org/I75619284"],"apc_list":null,"apc_paid":null,"fwci":0.7915,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.72007893,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"1510","issue":null,"first_page":"230","last_page":"235"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-analog-array","display_name":"Field-programmable analog array","score":0.8719027042388916},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8546029329299927},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6778229475021362},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5188649892807007},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5148600935935974},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4741089940071106},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.45925068855285645},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.42457810044288635},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.391180157661438},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31397494673728943},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.27332451939582825},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24649155139923096},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17438775300979614},{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.16907593607902527}],"concepts":[{"id":"https://openalex.org/C149128552","wikidata":"https://www.wikidata.org/wiki/Q380201","display_name":"Field-programmable analog array","level":5,"score":0.8719027042388916},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8546029329299927},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6778229475021362},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5188649892807007},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5148600935935974},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4741089940071106},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.45925068855285645},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.42457810044288635},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.391180157661438},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31397494673728943},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.27332451939582825},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24649155139923096},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17438775300979614},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.16907593607902527},{"id":"https://openalex.org/C98142538","wikidata":"https://www.wikidata.org/wiki/Q485005","display_name":"Analog multiplier","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2009.5272306","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272306","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1757537413","https://openalex.org/W1883089835","https://openalex.org/W1900872810","https://openalex.org/W1980989025","https://openalex.org/W2112357477","https://openalex.org/W2134714733","https://openalex.org/W2151155235","https://openalex.org/W2283952362","https://openalex.org/W6680092995"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2152074211","https://openalex.org/W2126857316","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2139962137","https://openalex.org/W2113308450","https://openalex.org/W2340647897","https://openalex.org/W3139915793"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,19],"comparison":[4,15],"between":[5],"two":[6],"technologies":[7],"for":[8,69],"reconfigurable":[9,34,67],"circuits:":[10],"FPGA's":[11],"and":[12,49],"FPAA's.":[13],"The":[14],"is":[16],"based":[17],"on":[18,54],"case":[20,56],"study":[21],"of":[22,25,33,44],"the":[23,42,55,64],"area":[24],"industrial":[26],"control":[27],"using":[28],"simulations":[29],"with":[30],"both":[31],"types":[32],"devices.":[35],"Several":[36],"design":[37],"issues":[38],"are":[39],"discussed,":[40],"including":[41],"ease":[43],"implementation,":[45],"accuracy,":[46],"capacity,":[47],"consumption":[48],"size,":[50],"among":[51],"others.":[52],"Based":[53],"study,":[57],"we":[58],"present":[59],"qualitative":[60],"directions":[61],"to":[62],"choose":[63],"most":[65],"suitable":[66],"device":[68],"similar":[70],"applications.":[71]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}