{"id":"https://openalex.org/W2033247479","doi":"https://doi.org/10.1109/fpl.2009.5272260","title":"DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs","display_name":"DPA resistance for light-weight implementations of cryptographic algorithms on FPGAs","publication_year":2009,"publication_date":"2009-08-01","ids":{"openalex":"https://openalex.org/W2033247479","doi":"https://doi.org/10.1109/fpl.2009.5272260","mag":"2033247479"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2009.5272260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5052658550","display_name":"Rajesh Velegalati","orcid":null},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Rajesh Velegalati","raw_affiliation_strings":["Volgenau School of IT&E, George Mason University, Fairfax, VA, USA"],"affiliations":[{"raw_affiliation_string":"Volgenau School of IT&E, George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039598410","display_name":"Jens-Peter Kaps","orcid":"https://orcid.org/0000-0002-7036-6433"},"institutions":[{"id":"https://openalex.org/I162714631","display_name":"George Mason University","ror":"https://ror.org/02jqj7156","country_code":"US","type":"education","lineage":["https://openalex.org/I162714631"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jens-Peter Kaps","raw_affiliation_strings":["Volgenau School of IT&E, George Mason University, Fairfax, VA, USA"],"affiliations":[{"raw_affiliation_string":"Volgenau School of IT&E, George Mason University, Fairfax, VA, USA","institution_ids":["https://openalex.org/I162714631"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5052658550"],"corresponding_institution_ids":["https://openalex.org/I162714631"],"apc_list":null,"apc_paid":null,"fwci":3.1536,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.91994073,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"31","issue":null,"first_page":"385","last_page":"390"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9939000010490417,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8370321989059448},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7673811912536621},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.7324303388595581},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.7101364135742188},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.6858391165733337},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5783814191818237},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.49703171849250793},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3414098620414734}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8370321989059448},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7673811912536621},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.7324303388595581},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.7101364135742188},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.6858391165733337},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5783814191818237},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.49703171849250793},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3414098620414734},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2009.5272260","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2009.5272260","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2009 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.229.3796","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.229.3796","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://cryptography.gmu.edu/%7Ejkaps/download.php?docid=1208","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1506423869","https://openalex.org/W1550842947","https://openalex.org/W1562542037","https://openalex.org/W1597200692","https://openalex.org/W1629850749","https://openalex.org/W1790072549","https://openalex.org/W2001824086","https://openalex.org/W2100854379","https://openalex.org/W2126541236","https://openalex.org/W2137769675","https://openalex.org/W2140979409","https://openalex.org/W2142700107","https://openalex.org/W2144630005","https://openalex.org/W2154909745","https://openalex.org/W2165637947","https://openalex.org/W2167418682","https://openalex.org/W2170510975","https://openalex.org/W4231098049","https://openalex.org/W6633579635","https://openalex.org/W6682554491"],"related_works":["https://openalex.org/W4388857716","https://openalex.org/W2913264063","https://openalex.org/W1968560271","https://openalex.org/W2091330445","https://openalex.org/W182679101","https://openalex.org/W2053832511","https://openalex.org/W2066443301","https://openalex.org/W2081998479","https://openalex.org/W2043669269","https://openalex.org/W2170575992"],"abstract_inverted_index":{"Recent":[0],"advances":[1],"in":[2,73,100],"Field":[3],"Programmable":[4],"Gate":[5],"Array":[6],"(FPGA)":[7],"technology":[8],"are":[9,26],"bound":[10],"to":[11,36,58,70],"make":[12],"FPGAs":[13,96],"a":[14,48,109],"popular":[15],"platform":[16],"for":[17,95],"battery":[18],"powered":[19],"devices.":[20],"Many":[21],"applications":[22],"of":[23,33,76,104],"such":[24,63],"devices":[25],"mission":[27],"critical":[28],"and":[29,124],"require":[30],"the":[31,38],"use":[32],"cryptographic":[34,54],"algorithms":[35],"provide":[37],"desired":[39],"security.":[40],"However,":[41],"Differential":[42,66],"Power":[43],"Analysis":[44],"(DPA)":[45],"attacks":[46,62,91],"pose":[47],"sever":[49],"threat":[50],"against":[51,60,89],"otherwise":[52],"secure":[53],"implementations.":[55,115],"Current":[56],"techniques":[57],"defend":[59],"DPA":[61,90],"as":[64],"Dynamic":[65],"Logic":[67],"(DDL)":[68],"lead":[69],"an":[71,101],"increase":[72,103],"area":[74,102],"consumption":[75],"factor":[77,110],"five":[78],"or":[79],"more.":[80],"In":[81],"this":[82],"paper":[83],"we":[84],"show":[85],"that":[86],"moderate":[87],"security":[88],"can":[92],"be":[93],"achieved":[94],"using":[97],"DDL":[98],"resulting":[99],"not":[105],"much":[106],"more":[107],"than":[108],"two":[111],"over":[112],"standard":[113],"FPGA":[114,121],"Our":[116],"design":[117,122],"flow":[118],"requires":[119],"only":[120],"tools":[123],"some":[125],"scripts.":[126]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
