{"id":"https://openalex.org/W2100204939","doi":"https://doi.org/10.1109/fpl.2008.4630011","title":"Self-recofigurable embedded systems on Spartan-3","display_name":"Self-recofigurable embedded systems on Spartan-3","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2100204939","doi":"https://doi.org/10.1109/fpl.2008.4630011","mag":"2100204939"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2008.4630011","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4630011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020449505","display_name":"Enrique Cant\u00f3","orcid":"https://orcid.org/0000-0002-5674-4119"},"institutions":[{"id":"https://openalex.org/I55952717","display_name":"Universidad Rovira i Virgili","ror":"https://ror.org/00g5sqv46","country_code":"ES","type":"education","lineage":["https://openalex.org/I55952717"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Enrique Canto","raw_affiliation_strings":["Dep. of Electronics, Electrical & Automatics, University Rovira i Virgili, Tarragona, Spain","Dept. of Electron., Electr. & Autom., Univ. Rovira i Virgili, Tarragona"],"affiliations":[{"raw_affiliation_string":"Dep. of Electronics, Electrical & Automatics, University Rovira i Virgili, Tarragona, Spain","institution_ids":["https://openalex.org/I55952717"]},{"raw_affiliation_string":"Dept. of Electron., Electr. & Autom., Univ. Rovira i Virgili, Tarragona","institution_ids":["https://openalex.org/I55952717"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5001696440","display_name":"Francesc Fons","orcid":"https://orcid.org/0000-0001-5901-7534"},"institutions":[{"id":"https://openalex.org/I55952717","display_name":"Universidad Rovira i Virgili","ror":"https://ror.org/00g5sqv46","country_code":"ES","type":"education","lineage":["https://openalex.org/I55952717"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francesc Fons","raw_affiliation_strings":["Dep. of Electronics, Electrical & Automatics, University Rovira i Virgili, Tarragona, Spain","Dept. of Electron., Electr. & Autom., Univ. Rovira i Virgili, Tarragona"],"affiliations":[{"raw_affiliation_string":"Dep. of Electronics, Electrical & Automatics, University Rovira i Virgili, Tarragona, Spain","institution_ids":["https://openalex.org/I55952717"]},{"raw_affiliation_string":"Dept. of Electron., Electr. & Autom., Univ. Rovira i Virgili, Tarragona","institution_ids":["https://openalex.org/I55952717"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022465466","display_name":"Mariano L\u00f3pez","orcid":null},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Mariano Lopez","raw_affiliation_strings":["Dep. of Electronics Engineering, Technical University of Catalonia, Vilanova i la Geltr\u00fa Barcelona, Spain","Dep. of Electronics Engineering, Technical University of Catalonia, Vilanova i la Geltr\u00fc (Barcelona), Spain"],"affiliations":[{"raw_affiliation_string":"Dep. of Electronics Engineering, Technical University of Catalonia, Vilanova i la Geltr\u00fa Barcelona, Spain","institution_ids":[]},{"raw_affiliation_string":"Dep. of Electronics Engineering, Technical University of Catalonia, Vilanova i la Geltr\u00fc (Barcelona), Spain","institution_ids":["https://openalex.org/I9617848"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5020449505"],"corresponding_institution_ids":["https://openalex.org/I55952717"],"apc_list":null,"apc_paid":null,"fwci":0.3466,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.68432533,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"571","last_page":"574"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spartan","display_name":"Spartan","score":0.8283992409706116},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7167128324508667},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.7044069766998291},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6951398253440857},{"id":"https://openalex.org/keywords/coprocessor","display_name":"Coprocessor","score":0.6436277031898499},{"id":"https://openalex.org/keywords/bitstream","display_name":"Bitstream","score":0.5982844233512878},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5464486479759216},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5372639894485474},{"id":"https://openalex.org/keywords/stream-processing","display_name":"Stream processing","score":0.46697282791137695},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44319984316825867},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4324963688850403},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.339575856924057},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18245112895965576},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.10337993502616882},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10168465971946716}],"concepts":[{"id":"https://openalex.org/C10689553","wikidata":"https://www.wikidata.org/wiki/Q405953","display_name":"Spartan","level":3,"score":0.8283992409706116},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7167128324508667},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.7044069766998291},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6951398253440857},{"id":"https://openalex.org/C86111242","wikidata":"https://www.wikidata.org/wiki/Q859595","display_name":"Coprocessor","level":2,"score":0.6436277031898499},{"id":"https://openalex.org/C136695289","wikidata":"https://www.wikidata.org/wiki/Q415568","display_name":"Bitstream","level":3,"score":0.5982844233512878},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5464486479759216},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5372639894485474},{"id":"https://openalex.org/C107027933","wikidata":"https://www.wikidata.org/wiki/Q2006448","display_name":"Stream processing","level":2,"score":0.46697282791137695},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44319984316825867},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4324963688850403},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.339575856924057},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18245112895965576},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.10337993502616882},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10168465971946716}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2008.4630011","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4630011","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1970303013","https://openalex.org/W1994652506","https://openalex.org/W2154961667"],"related_works":["https://openalex.org/W3110137422","https://openalex.org/W3215016102","https://openalex.org/W2047513257","https://openalex.org/W2182587364","https://openalex.org/W2184970878","https://openalex.org/W2800539186","https://openalex.org/W1663248305","https://openalex.org/W1995076172","https://openalex.org/W4200122249","https://openalex.org/W1521374047"],"abstract_inverted_index":{"This":[0],"paper":[1,47],"describes":[2],"the":[3,35],"architecture":[4],"and":[5,41,64],"design":[6,42],"flow":[7],"of":[8,34],"a":[9,15,20,27],"self-reconfigurable":[10],"embedded":[11],"system,":[12],"mapped":[13],"on":[14],"Spartan-3":[16,30],"low-cost":[17,31],"FPGA,":[18],"where":[19],"fixed":[21],"area":[22],"is":[23],"reserved":[24],"to":[25],"accommodate":[26],"reconfigurable":[28],"coprocessor.":[29],"family":[32],"lacks":[33],"ICAP":[36],"(Internal":[37],"Configuration":[38],"Access":[39],"Port)":[40],"tools":[43],"for":[44],"self-reconfiguration.":[45],"The":[46],"also":[48],"deals":[49],"with":[50],"other":[51],"issues,":[52],"such":[53],"as":[54],"OPB":[55],"isolation,":[56],"bit-stream":[57,62],"retrieve":[58],"from":[59],"external":[60],"SRAM,":[61],"processing,":[63],"clock":[65],"routing.":[66]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
