{"id":"https://openalex.org/W2125526835","doi":"https://doi.org/10.1109/fpl.2008.4630005","title":"Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor","display_name":"Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2125526835","doi":"https://doi.org/10.1109/fpl.2008.4630005","mag":"2125526835"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2008.4630005","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4630005","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"https://research-information.bris.ac.uk/files/3014356/zaidi_IEEE_FPL_2008.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110230036","display_name":"Izhar Zaidi","orcid":null},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Izhar Zaidi","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Bristol, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Bristol, UK","institution_ids":["https://openalex.org/I36234482"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000834774","display_name":"Atukem Nabina","orcid":null},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Atukem Nabina","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Bristol, UK"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Bristol, UK","institution_ids":["https://openalex.org/I36234482"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110460235","display_name":"C.N. Canagarajah","orcid":null},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"C.N. Canagarajah","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Bristol, UK","[Dept. of Electr. & Electron. Eng., Univ. of Bristol, Bristol]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Bristol, UK","institution_ids":["https://openalex.org/I36234482"]},{"raw_affiliation_string":"[Dept. of Electr. & Electron. Eng., Univ. of Bristol, Bristol]","institution_ids":["https://openalex.org/I36234482"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005255540","display_name":"Jose Nunez\u2010Yanez","orcid":"https://orcid.org/0000-0002-5153-5481"},"institutions":[{"id":"https://openalex.org/I36234482","display_name":"University of Bristol","ror":"https://ror.org/0524sp257","country_code":"GB","type":"education","lineage":["https://openalex.org/I36234482"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Jose Nunez-Yanez","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Bristol, UK","[Dept. of Electr. & Electron. Eng., Univ. of Bristol, Bristol]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Bristol, UK","institution_ids":["https://openalex.org/I36234482"]},{"raw_affiliation_string":"[Dept. of Electr. & Electron. Eng., Univ. of Bristol, Bristol]","institution_ids":["https://openalex.org/I36234482"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I36234482"],"apc_list":null,"apc_paid":null,"fwci":0.1879,"has_fulltext":true,"cited_by_count":3,"citation_normalized_percentile":{"value":0.40640875,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"547","last_page":"550"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.8811441659927368},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.8067327737808228},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7461368441581726},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7236513495445251},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.5272052884101868},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5096549987792969},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.4526965916156769},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.43707695603370667},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4367370009422302},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.42046529054641724},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3581995964050293},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15453165769577026},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.13719311356544495}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.8811441659927368},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.8067327737808228},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7461368441581726},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7236513495445251},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.5272052884101868},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5096549987792969},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.4526965916156769},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.43707695603370667},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4367370009422302},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.42046529054641724},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3581995964050293},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15453165769577026},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.13719311356544495},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/fpl.2008.4630005","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4630005","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"pmh:oai:research-information.bris.ac.uk:openaire/2514739c-2269-46e1-bdf6-3ada0022ec79","is_oa":true,"landing_page_url":"https://research-information.bris.ac.uk/en/publications/2514739c-2269-46e1-bdf6-3ada0022ec79","pdf_url":"https://research-information.bris.ac.uk/files/3014356/zaidi_IEEE_FPL_2008.pdf","source":{"id":"https://openalex.org/S4306400895","display_name":"Bristol Research (University of Bristol)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I36234482","host_organization_name":"University of Bristol","host_organization_lineage":["https://openalex.org/I36234482"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Zaidi, SIH, Nabina, A, Canagarajah, CN & Nunez-Yanez, JL 2008, Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor. in International Conference on Field Programmable Logic and Applications, 2008 (FPL 2008), Heidelberg. Institute of Electrical and Electronics Engineers (IEEE), pp. 547 - 550. https://doi.org/10.1109/FPL.2008.4630005","raw_type":"contributionToPeriodical"},{"id":"pmh:oai:research-information.bris.ac.uk:publications/2514739c-2269-46e1-bdf6-3ada0022ec79","is_oa":false,"landing_page_url":"http://hdl.handle.net/1983/1346","pdf_url":null,"source":{"id":"https://openalex.org/S4306400895","display_name":"Bristol Research (University of Bristol)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I36234482","host_organization_name":"University of Bristol","host_organization_lineage":["https://openalex.org/I36234482"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":""}],"best_oa_location":{"id":"pmh:oai:research-information.bris.ac.uk:openaire/2514739c-2269-46e1-bdf6-3ada0022ec79","is_oa":true,"landing_page_url":"https://research-information.bris.ac.uk/en/publications/2514739c-2269-46e1-bdf6-3ada0022ec79","pdf_url":"https://research-information.bris.ac.uk/files/3014356/zaidi_IEEE_FPL_2008.pdf","source":{"id":"https://openalex.org/S4306400895","display_name":"Bristol Research (University of Bristol)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I36234482","host_organization_name":"University of Bristol","host_organization_lineage":["https://openalex.org/I36234482"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Zaidi, SIH, Nabina, A, Canagarajah, CN & Nunez-Yanez, JL 2008, Evaluating dynamic partial reconfiguration in the integer pipeline of a FPGA-based opensource processor. in International Conference on Field Programmable Logic and Applications, 2008 (FPL 2008), Heidelberg. Institute of Electrical and Electronics Engineers (IEEE), pp. 547 - 550. https://doi.org/10.1109/FPL.2008.4630005","raw_type":"contributionToPeriodical"},"sustainable_development_goals":[{"score":0.8399999737739563,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2125526835.pdf","grobid_xml":"https://content.openalex.org/works/W2125526835.grobid-xml"},"referenced_works_count":8,"referenced_works":["https://openalex.org/W1826626982","https://openalex.org/W1873700411","https://openalex.org/W1970303013","https://openalex.org/W2081974348","https://openalex.org/W2083847136","https://openalex.org/W2108512263","https://openalex.org/W2116650992","https://openalex.org/W2149052212"],"related_works":["https://openalex.org/W2808484818","https://openalex.org/W2810427553","https://openalex.org/W2135053878","https://openalex.org/W2941434274","https://openalex.org/W2340647897","https://openalex.org/W4249632163","https://openalex.org/W1760305469","https://openalex.org/W2797161794","https://openalex.org/W2073075351","https://openalex.org/W2096938998"],"abstract_inverted_index":{"This":[0],"work":[1],"explores":[2],"the":[3,14,18,30,48],"potential":[4],"of":[5,17,50,86],"sharing":[6],"different":[7],"arithmetic":[8],"hardware":[9],"operators":[10],"tightly":[11],"coupled":[12],"to":[13,25,29,46,66,75,77],"integer":[15],"pipeline":[16],"open-source":[19],"LEON3":[20],"processor.":[21],"The":[22,40,59],"idea":[23],"is":[24],"map":[26],"these":[27],"modules":[28],"same":[31,41],"silicon":[32],"area":[33,38],"saving":[34],"power":[35],"consumption":[36],"and":[37,80],"utilisation.":[39],"strategy":[42],"can":[43],"be":[44],"used":[45],"extend":[47],"architecture":[49],"processors":[51],"optimized":[52],"for":[53],"applications":[54],"with":[55,82],"specific":[56],"energy":[57],"constraints.":[58],"proposed":[60],"platform":[61],"serves":[62],"as":[63],"a":[64,83],"guideline":[65],"illustrate":[67],"gains":[68],"obtained":[69],"through":[70],"partial":[71],"reconfiguration":[72],"that":[73],"need":[74],"adapt":[76],"changing":[78],"standards":[79],"protocols":[81],"limited":[84],"number":[85],"resources.":[87]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-08-18T07:49:30.821534","created_date":"2016-06-24T00:00:00"}
