{"id":"https://openalex.org/W1998778168","doi":"https://doi.org/10.1109/fpl.2008.4629950","title":"An integrated debugging environment for FPGA computing platforms","display_name":"An integrated debugging environment for FPGA computing platforms","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W1998778168","doi":"https://doi.org/10.1109/fpl.2008.4629950","mag":"1998778168"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2008.4629950","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629950","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027887388","display_name":"Kevin Camera","orcid":null},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Kevin Camera","raw_affiliation_strings":["Berkeley Wireless Research Center, University of California, Berkeley, CA, USA","Berkeley Wireless Research Center, University of California, Berkeley, CA#TAB#"],"affiliations":[{"raw_affiliation_string":"Berkeley Wireless Research Center, University of California, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]},{"raw_affiliation_string":"Berkeley Wireless Research Center, University of California, Berkeley, CA#TAB#","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087529266","display_name":"R.W. Brodersen","orcid":null},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Robert W. Brodersen","raw_affiliation_strings":["Berkeley Wireless Research Center, University of California, Berkeley, CA, USA","Berkeley Wireless Research Center, University of California, Berkeley, CA#TAB#"],"affiliations":[{"raw_affiliation_string":"Berkeley Wireless Research Center, University of California, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]},{"raw_affiliation_string":"Berkeley Wireless Research Center, University of California, Berkeley, CA#TAB#","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5027887388"],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":1.0398,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.79588657,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"3526","issue":null,"first_page":"311","last_page":"316"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8515571355819702},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.6639124155044556},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.46980199217796326},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46163368225097656},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32081902027130127},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2515103816986084}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8515571355819702},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.6639124155044556},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.46980199217796326},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46163368225097656},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32081902027130127},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2515103816986084}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2008.4629950","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629950","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1604438419","https://openalex.org/W1975085273","https://openalex.org/W1978507093","https://openalex.org/W2030922743","https://openalex.org/W2041958163","https://openalex.org/W2102081731","https://openalex.org/W2138610902","https://openalex.org/W2147796461","https://openalex.org/W2157566197","https://openalex.org/W4236258190","https://openalex.org/W4239654162","https://openalex.org/W6817363484"],"related_works":["https://openalex.org/W2993910401","https://openalex.org/W2096844293","https://openalex.org/W2978026406","https://openalex.org/W2363944576","https://openalex.org/W1999657508","https://openalex.org/W2399091034","https://openalex.org/W2351581202","https://openalex.org/W2366922255","https://openalex.org/W2351041855","https://openalex.org/W2570254841"],"abstract_inverted_index":{"Large-scale,":[0],"direct-mapped":[1],"FPGA":[2,43],"computing":[3],"systems":[4],"are":[5,39,52,116],"traditionally":[6],"very":[7],"difficult":[8],"to":[9,12,21,28,67,93,149],"debug":[10,172],"due":[11],"the":[13,32,42,49,59,91,104,109,129,142,146,167,171],"high":[14],"level":[15],"of":[16,34,111,170],"parallelism":[17],"and":[18,36,90,136,174],"limited":[19],"access":[20,66],"internal":[22],"signal":[23],"values.":[24],"In":[25],"our":[26],"approach":[27],"mitigate":[29],"this":[30],"problem,":[31],"concepts":[33],"variables":[35],"process":[37],"control":[38],"brought":[40],"into":[41,54,58],"hardware":[44,60,68],"domain.":[45],"Declarations":[46],"made":[47],"in":[48,128],"design":[50,131],"environment":[51],"translated":[53],"logic":[55,143],"inserted":[56],"automatically":[57],"implementation.":[61],"Variables":[62],"provide":[63],"full":[64,158],"read/write":[65],"signals":[69],"during":[70],"runtime,":[71],"complete":[72],"with":[73,157],"same-cycle,":[74],"dynamically":[75],"definable":[76],"assertion":[77,159],"checking.":[78],"System":[79],"data":[80,134],"is":[81],"cached":[82],"via":[83,118],"attached":[84],"DRAM,":[85],"providing":[86],"deep":[87],"variable":[88,156],"history":[89],"ability":[92],"ldquorewindrdquo":[94],"system":[95],"state.":[96],"Process":[97],"execution":[98],"can":[99],"also":[100,125],"be":[101,150],"controlled":[102],"by":[103],"user":[105,122],"manually":[106],"or":[107],"through":[108],"declaration":[110],"breakpoints.":[112],"All":[113],"debugging":[114],"controls":[115],"available":[117],"a":[119,162],"remote":[120],"graphical":[121],"interface,":[123],"which":[124],"supports":[126],"back-annotation":[127],"input":[130],"for":[132,145],"improved":[133],"visibility":[135],"comprehension.":[137],"Empirical":[138],"examples":[139],"have":[140],"shown":[141],"overhead":[144],"above":[147],"functionality":[148],"approximately":[151],"66":[152],"slices":[153],"per":[154],"16-bit":[155],"checking":[160],"on":[161],"Virtex-II":[163],"Pro":[164],"device,":[165],"plus":[166],"fixed":[168],"requirements":[169],"controller":[173],"memory":[175],"interface.":[176]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
