{"id":"https://openalex.org/W2016423739","doi":"https://doi.org/10.1109/fpl.2008.4629927","title":"CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures","display_name":"CHiMPS: A C-level compilation flow for hybrid CPU-FPGA architectures","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W2016423739","doi":"https://doi.org/10.1109/fpl.2008.4629927","mag":"2016423739"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2008.4629927","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629927","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024883549","display_name":"Andrew Putnam","orcid":"https://orcid.org/0000-0001-5241-5695"},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Andrew Putnam","raw_affiliation_strings":["Department of CSE, University of Washington, Seattle, WA, USA","Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of CSE, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036964031","display_name":"Dave Bennett","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dave Bennett","raw_affiliation_strings":["Department of CSE, University of Washington, Seattle, WA, USA","Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of CSE, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070616806","display_name":"Eric Dellinger","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Eric Dellinger","raw_affiliation_strings":["Department of CSE, University of Washington, Seattle, WA, USA","Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of CSE, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061886781","display_name":"Jeff Mason","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeff Mason","raw_affiliation_strings":["Department of CSE, University of Washington, Seattle, WA, USA","Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of CSE, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000693480","display_name":"Prasanna Sundararajan","orcid":null},"institutions":[{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Prasanna Sundararajan","raw_affiliation_strings":["Department of CSE, University of Washington, Seattle, WA, USA","Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of CSE, University of Washington, Seattle, WA, USA","institution_ids":["https://openalex.org/I201448701"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#","institution_ids":["https://openalex.org/I201448701"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051475447","display_name":"Susan J. Eggers","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]},{"id":"https://openalex.org/I201448701","display_name":"University of Washington","ror":"https://ror.org/00cvxb145","country_code":"US","type":"education","lineage":["https://openalex.org/I201448701"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Susan Eggers","raw_affiliation_strings":["Xilinx Research Laboratories, Longmont, CO, USA","Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#"],"affiliations":[{"raw_affiliation_string":"Xilinx Research Laboratories, Longmont, CO, USA","institution_ids":["https://openalex.org/I32923980"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, University, of Washington, Seattle WA#TAB#","institution_ids":["https://openalex.org/I201448701"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5024883549"],"corresponding_institution_ids":["https://openalex.org/I201448701"],"apc_list":null,"apc_paid":null,"fwci":3.4661,"has_fulltext":false,"cited_by_count":48,"citation_normalized_percentile":{"value":0.92739171,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"173","last_page":"178"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8063623309135437},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.794218897819519},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7857802510261536},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.60463947057724},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.581979513168335},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.48038250207901},{"id":"https://openalex.org/keywords/code","display_name":"Code (set theory)","score":0.44958826899528503},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.41860267519950867},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.25238528847694397}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8063623309135437},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.794218897819519},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7857802510261536},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.60463947057724},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.581979513168335},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.48038250207901},{"id":"https://openalex.org/C2776760102","wikidata":"https://www.wikidata.org/wiki/Q5139990","display_name":"Code (set theory)","level":3,"score":0.44958826899528503},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.41860267519950867},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.25238528847694397},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2008.4629927","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629927","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1523813310","https://openalex.org/W1603822975","https://openalex.org/W1674171813","https://openalex.org/W1822968287","https://openalex.org/W2013286553","https://openalex.org/W2048167605","https://openalex.org/W2051368227","https://openalex.org/W2055302606","https://openalex.org/W2147910407","https://openalex.org/W2156420848","https://openalex.org/W2165099691","https://openalex.org/W6684268144"],"related_works":["https://openalex.org/W3004362061","https://openalex.org/W4297665406","https://openalex.org/W2364622490","https://openalex.org/W2042515040","https://openalex.org/W2383986884","https://openalex.org/W2356141508","https://openalex.org/W2749962643","https://openalex.org/W2390807153","https://openalex.org/W2122949436","https://openalex.org/W78782492"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"CHiMPS,":[3],"a":[4,62],"C-based":[5],"accelerator":[6,38],"compiler":[7],"for":[8,20,34],"hybrid":[9],"CPU-FPGA":[10],"computing":[11,22],"platforms.":[12],"CHiMPS\u2019s":[13],"goal":[14],"is":[15,40],"to":[16,48,54],"facilitate":[17],"FPGA":[18],"programming":[19],"high-performance":[21],"developers.":[23],"It":[24],"inputs":[25],"generic":[26],"ANSIC":[27],"code":[28,70],"and":[29],"automatically":[30],"generates":[31],"VHDL":[32],"blocks":[33],"an":[35],"FPGA.":[36],"The":[37],"architecture":[39],"customized":[41],"with":[42,67],"multiple":[43],"caches":[44],"that":[45],"are":[46,59],"tuned":[47],"the":[49],"application.":[50],"Speedups":[51],"of":[52,64],"2.8x":[53],"36.9x":[55],"(geometric":[56],"mean":[57],"6.7x)":[58],"achieved":[60],"on":[61],"variety":[63],"HPC":[65],"benchmarks":[66],"minimal":[68],"source":[69],"changes.":[71]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}