{"id":"https://openalex.org/W1978374945","doi":"https://doi.org/10.1109/fpl.2008.4629919","title":"An efficient run-time router for connecting modules in FPGAS","display_name":"An efficient run-time router for connecting modules in FPGAS","publication_year":2008,"publication_date":"2008-01-01","ids":{"openalex":"https://openalex.org/W1978374945","doi":"https://doi.org/10.1109/fpl.2008.4629919","mag":"1978374945"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2008.4629919","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629919","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5049475473","display_name":"Jorge Suris","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jorge Suris","raw_affiliation_strings":["Bradley Department of Electrical and Computer Engineering, Configurable Computing Laboratory, Virginia Technology, Blacksburg, VA, USA","Bradley Dept. of Electr. & Comput. Eng., Virginia Tech., Blacksburg, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of Electrical and Computer Engineering, Configurable Computing Laboratory, Virginia Technology, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Dept. of Electr. & Comput. Eng., Virginia Tech., Blacksburg, VA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109675287","display_name":"Cameron Patterson","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Cameron Patterson","raw_affiliation_strings":["Bradley Department of Electrical and Computer Engineering, Configurable Computing Laboratory, Virginia Technology, Blacksburg, VA, USA","Bradley Dept. of Electr. & Comput. Eng., Virginia Tech., Blacksburg, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of Electrical and Computer Engineering, Configurable Computing Laboratory, Virginia Technology, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Dept. of Electr. & Comput. Eng., Virginia Tech., Blacksburg, VA","institution_ids":["https://openalex.org/I859038795"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5111933984","display_name":"Peter Athanas","orcid":null},"institutions":[{"id":"https://openalex.org/I859038795","display_name":"Virginia Tech","ror":"https://ror.org/02smfhw86","country_code":"US","type":"education","lineage":["https://openalex.org/I859038795"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peter Athanas","raw_affiliation_strings":["Bradley Department of Electrical and Computer Engineering, Configurable Computing Laboratory, Virginia Technology, Blacksburg, VA, USA","Bradley Dept. of Electr. & Comput. Eng., Virginia Tech., Blacksburg, VA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Bradley Department of Electrical and Computer Engineering, Configurable Computing Laboratory, Virginia Technology, Blacksburg, VA, USA","institution_ids":["https://openalex.org/I859038795"]},{"raw_affiliation_string":"Bradley Dept. of Electr. & Comput. Eng., Virginia Tech., Blacksburg, VA","institution_ids":["https://openalex.org/I859038795"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I859038795"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"125","last_page":"130"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.778107225894928},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7382878065109253},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6968571543693542},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6772891283035278},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5944746732711792},{"id":"https://openalex.org/keywords/vendor","display_name":"Vendor","score":0.5605601668357849},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.5262799859046936},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.485258549451828},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.4773540496826172},{"id":"https://openalex.org/keywords/workstation","display_name":"Workstation","score":0.45287689566612244},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.4244895875453949},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.30137690901756287},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2517867684364319}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.778107225894928},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7382878065109253},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6968571543693542},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6772891283035278},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5944746732711792},{"id":"https://openalex.org/C2777338717","wikidata":"https://www.wikidata.org/wiki/Q1762621","display_name":"Vendor","level":2,"score":0.5605601668357849},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.5262799859046936},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.485258549451828},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.4773540496826172},{"id":"https://openalex.org/C67953723","wikidata":"https://www.wikidata.org/wiki/Q192525","display_name":"Workstation","level":2,"score":0.45287689566612244},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.4244895875453949},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.30137690901756287},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2517867684364319},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C162853370","wikidata":"https://www.wikidata.org/wiki/Q39809","display_name":"Marketing","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2008.4629919","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629919","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.218.6943","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.218.6943","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ccm.ece.vt.edu/papers/suris_2008_FPL08_runtimerouter.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320332467","display_name":"U.S. Air Force","ror":"https://ror.org/006gmme17"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1741636081","https://openalex.org/W2047361732","https://openalex.org/W2062435236","https://openalex.org/W2084478983","https://openalex.org/W2139637699","https://openalex.org/W2158538599","https://openalex.org/W2275304190","https://openalex.org/W3151546682"],"related_works":["https://openalex.org/W2154523322","https://openalex.org/W2083200807","https://openalex.org/W1603137082","https://openalex.org/W2364195017","https://openalex.org/W2355430452","https://openalex.org/W2049983405","https://openalex.org/W2392315374","https://openalex.org/W1951195060","https://openalex.org/W2351776620","https://openalex.org/W2320225356"],"abstract_inverted_index":{"It":[0],"is":[1,57,70],"often":[2],"desirable":[3],"to":[4,36],"change":[5],"the":[6,9,17,54,84,93,98],"logic":[7],"and/or":[8],"connections":[10],"within":[11],"an":[12],"FPGA":[13],"design":[14],"on-the-fly":[15],"without":[16],"benefit":[18],"of":[19,64,73,111,114],"a":[20,29,49],"workstation":[21],"or":[22],"vendor":[23],"CAD":[24],"software.":[25],"This":[26],"paper":[27],"presents":[28],"dynamic":[30],"router":[31,94],"for":[32,53],"Xilinx":[33,99],"FPGAs,":[34],"designed":[35],"run":[37],"on":[38],"stand-alone":[39],"embedded":[40],"systems.":[41],"With":[42],"information":[43],"obtained":[44],"from":[45],"Xilinxpsilas":[46],"XDL":[47],"tool,":[48],"compact":[50],"routing":[51,68,81],"database":[52],"Virtex-II/IIP/4":[55],"devices":[56],"built":[58],"which":[59],"only":[60],"requires":[61],"96":[62],"KB":[63],"storage.":[65],"A":[66],"channel":[67,85],"algorithm":[69],"used":[71],"because":[72,79],"its":[74],"deterministic":[75],"execution":[76,105],"time":[77,106],"and":[78,95,107],"all":[80],"resources":[82],"in":[83,103,108],"are":[86,90,116],"available.":[87],"Sample":[88],"channels":[89],"routed":[91],"with":[92,97],"compared":[96],"PAR":[100],"tool.":[101],"Improvements":[102],"both":[104],"memory":[109],"usage":[110],"several":[112],"orders":[113],"magnitude":[115],"observed.":[117]},"counts_by_year":[{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":8}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}