{"id":"https://openalex.org/W2127103393","doi":"https://doi.org/10.1109/fpl.2008.4629911","title":"How fast is an FPGA in image processing?","display_name":"How fast is an FPGA in image processing?","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2127103393","doi":"https://doi.org/10.1109/fpl.2008.4629911","mag":"2127103393"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2008.4629911","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629911","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110597097","display_name":"Takashi Saegusa","orcid":null},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Takashi Saegusa","raw_affiliation_strings":["Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-ou-dai Ibaraki 305-8573 JAPAN","Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan"],"affiliations":[{"raw_affiliation_string":"Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-ou-dai Ibaraki 305-8573 JAPAN","institution_ids":["https://openalex.org/I146399215"]},{"raw_affiliation_string":"Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan","institution_ids":["https://openalex.org/I146399215"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102968876","display_name":"Tsutomu Maruyama","orcid":"https://orcid.org/0000-0003-3857-2357"},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tsutomu Maruyama","raw_affiliation_strings":["Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-ou-dai Ibaraki 305-8573 JAPAN","Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan"],"affiliations":[{"raw_affiliation_string":"Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-ou-dai Ibaraki 305-8573 JAPAN","institution_ids":["https://openalex.org/I146399215"]},{"raw_affiliation_string":"Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan","institution_ids":["https://openalex.org/I146399215"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060442383","display_name":"Yoshiki Yamaguchi","orcid":"https://orcid.org/0000-0001-9744-8271"},"institutions":[{"id":"https://openalex.org/I146399215","display_name":"University of Tsukuba","ror":"https://ror.org/02956yf07","country_code":"JP","type":"education","lineage":["https://openalex.org/I146399215"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yoshiki Yamaguchi","raw_affiliation_strings":["Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-ou-dai Ibaraki 305-8573 JAPAN","Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan"],"affiliations":[{"raw_affiliation_string":"Systems and Information Engineering, University of Tsukuba, 1-1-1 Ten-ou-dai Ibaraki 305-8573 JAPAN","institution_ids":["https://openalex.org/I146399215"]},{"raw_affiliation_string":"Systems and Information Engineering, University of Tsukuba, Tsukuba, Ibaraki, Japan","institution_ids":["https://openalex.org/I146399215"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5110597097"],"corresponding_institution_ids":["https://openalex.org/I146399215"],"apc_list":null,"apc_paid":null,"fwci":4.746,"has_fulltext":false,"cited_by_count":53,"citation_normalized_percentile":{"value":0.94973656,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"108","issue":"48","first_page":"77","last_page":"82"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10627","display_name":"Advanced Image and Video Retrieval Techniques","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8294620513916016},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6927245855331421},{"id":"https://openalex.org/keywords/image-processing","display_name":"Image processing","score":0.6398323178291321},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.6220982074737549},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.47980526089668274},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46987253427505493},{"id":"https://openalex.org/keywords/parallelism","display_name":"Parallelism (grammar)","score":0.44252803921699524},{"id":"https://openalex.org/keywords/digital-image-processing","display_name":"Digital image processing","score":0.43056631088256836},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4146483838558197},{"id":"https://openalex.org/keywords/parallel-processing","display_name":"Parallel processing","score":0.41148287057876587},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.37389078736305237},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34639233350753784},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17849913239479065}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8294620513916016},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6927245855331421},{"id":"https://openalex.org/C9417928","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Image processing","level":3,"score":0.6398323178291321},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.6220982074737549},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.47980526089668274},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46987253427505493},{"id":"https://openalex.org/C2781172179","wikidata":"https://www.wikidata.org/wiki/Q853109","display_name":"Parallelism (grammar)","level":2,"score":0.44252803921699524},{"id":"https://openalex.org/C104317675","wikidata":"https://www.wikidata.org/wiki/Q1070689","display_name":"Digital image processing","level":4,"score":0.43056631088256836},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4146483838558197},{"id":"https://openalex.org/C106515295","wikidata":"https://www.wikidata.org/wiki/Q26806595","display_name":"Parallel processing","level":2,"score":0.41148287057876587},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.37389078736305237},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34639233350753784},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17849913239479065}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2008.4629911","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2008.4629911","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"mag:2913793567","is_oa":false,"landing_page_url":"https://www.ieice.org/ken/paper/20080523ka35/eng/","pdf_url":null,"source":{"id":"https://openalex.org/S4306512848","display_name":"IEICE Technical Report; IEICE Tech. Rep.","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":null,"license_id":null,"version":null,"is_accepted":false,"is_published":null,"raw_source_name":"IEICE Technical Report; IEICE Tech. Rep.","raw_type":null}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W610954022","https://openalex.org/W1527243007","https://openalex.org/W2041908012","https://openalex.org/W2042166919","https://openalex.org/W2112485750","https://openalex.org/W2112683038","https://openalex.org/W2127103393","https://openalex.org/W2154555084","https://openalex.org/W2159375099","https://openalex.org/W2163847543","https://openalex.org/W4248353501","https://openalex.org/W6679067539"],"related_works":["https://openalex.org/W2766828645","https://openalex.org/W2065177255","https://openalex.org/W2013845618","https://openalex.org/W2156571376","https://openalex.org/W1576657130","https://openalex.org/W1667038987","https://openalex.org/W2006445609","https://openalex.org/W2096870795","https://openalex.org/W1912915651","https://openalex.org/W2167865373"],"abstract_inverted_index":{"In":[0,53,91],"image":[1,27,86,107,125],"processing,":[2,28,126],"FPGAs":[3,46,99],"have":[4],"shown":[5],"very":[6],"high":[7,17,22,30],"performance":[8,18,97],"in":[9,24,26,51,69,106,124],"spite":[10],"of":[11,32,41,98],"their":[12],"low":[13],"operational":[14],"frequency.":[15],"This":[16],"comes":[19],"from":[20],"(1)":[21],"parallelism":[23],"applications":[25,105],"(2)":[29],"ratio":[31],"8":[33],"bit":[34,67],"operations,":[35],"and":[36,78,112,115,127],"(3)":[37],"a":[38],"large":[39,79],"number":[40],"internal":[42],"memory":[43,81],"banks":[44],"on":[45,65],"which":[47,82],"can":[48,83],"be":[49],"accessed":[50],"parallel.":[52],"the":[54,96,136],"recent":[55],"micro":[56],"processors,":[57],"it":[58,117],"becomes":[59],"possible":[60],"to":[61,134],"execute":[62],"SIMD":[63],"instructions":[64],"128":[66],"data":[68,87],"one":[70],"clock":[71],"cycle.":[72],"Furthermore,":[73],"these":[74],"processors":[75,102],"support":[76],"multi-cores":[77],"cache":[80],"hold":[84],"all":[85],"for":[88],"each":[89],"core.":[90],"this":[92],"paper,":[93],"we":[94],"compare":[95],"with":[100],"those":[101],"using":[103],"three":[104],"processing;":[108],"two-dimensional":[109],"filters,":[110],"stereo-vision":[111],"k-means":[113],"clustering,":[114],"make":[116],"clear":[118],"how":[119,128],"fast":[120],"is":[121],"an":[122],"FPGA":[123],"many":[129],"hardware":[130],"resources":[131],"are":[132],"required":[133],"achieve":[135],"performance.":[137]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":6},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
