{"id":"https://openalex.org/W2092302508","doi":"https://doi.org/10.1109/fpl.2007.4380770","title":"A Novel Event Based Simulation Algorithm for Sequential Digital Circuit Simulation","display_name":"A Novel Event Based Simulation Algorithm for Sequential Digital Circuit Simulation","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2092302508","doi":"https://doi.org/10.1109/fpl.2007.4380770","mag":"2092302508"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2007.4380770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5113651631","display_name":"Karthick Parashar","orcid":null},"institutions":[{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]},{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"K N Parashar","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology, Chennai, India","Indian Institute of Technology , Chennai#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology, Chennai, India","institution_ids":["https://openalex.org/I24676775"]},{"raw_affiliation_string":"Indian Institute of Technology , Chennai#TAB#","institution_ids":["https://openalex.org/I64295750"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009851991","display_name":"Nitin Chandrachoodan","orcid":"https://orcid.org/0000-0002-9258-7317"},"institutions":[{"id":"https://openalex.org/I64295750","display_name":"Indian Institute of Technology Indore","ror":"https://ror.org/01hhf7w52","country_code":"IN","type":"education","lineage":["https://openalex.org/I64295750"]},{"id":"https://openalex.org/I24676775","display_name":"Indian Institute of Technology Madras","ror":"https://ror.org/03v0r5n49","country_code":"IN","type":"facility","lineage":["https://openalex.org/I24676775"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"N Chandrachoodan","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology, Chennai, India","Indian Institute of Technology , Chennai#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology, Chennai, India","institution_ids":["https://openalex.org/I24676775"]},{"raw_affiliation_string":"Indian Institute of Technology , Chennai#TAB#","institution_ids":["https://openalex.org/I64295750"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5113651631"],"corresponding_institution_ids":["https://openalex.org/I24676775","https://openalex.org/I64295750"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16805635,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"792","last_page":"795"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},"topics":[{"id":"https://openalex.org/T11195","display_name":"Simulation Techniques and Applications","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1803","display_name":"Management Science and Operations Research"},"field":{"id":"https://openalex.org/fields/18","display_name":"Decision Sciences"},"domain":{"id":"https://openalex.org/domains/2","display_name":"Social Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8165751695632935},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5684412717819214},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5280452966690063},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.49136820435523987},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.486025869846344},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.4830392003059387},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.47497886419296265},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.46245622634887695},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.45694857835769653},{"id":"https://openalex.org/keywords/queue","display_name":"Queue","score":0.42139115929603577},{"id":"https://openalex.org/keywords/sorting","display_name":"Sorting","score":0.4107191264629364},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38412874937057495},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3571840524673462},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3416558504104614},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3332476317882538}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8165751695632935},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5684412717819214},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5280452966690063},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.49136820435523987},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.486025869846344},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4830392003059387},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.47497886419296265},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.46245622634887695},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.45694857835769653},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.42139115929603577},{"id":"https://openalex.org/C111696304","wikidata":"https://www.wikidata.org/wiki/Q2303697","display_name":"Sorting","level":2,"score":0.4107191264629364},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38412874937057495},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3571840524673462},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3416558504104614},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3332476317882538},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2007.4380770","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380770","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W1599807609","https://openalex.org/W2062787864","https://openalex.org/W2106795195","https://openalex.org/W2137819273","https://openalex.org/W2140958343","https://openalex.org/W2143529626","https://openalex.org/W2152223761","https://openalex.org/W2162583068","https://openalex.org/W2164122783","https://openalex.org/W3146175313","https://openalex.org/W4238726502","https://openalex.org/W4241489105","https://openalex.org/W4254822137","https://openalex.org/W6675439207","https://openalex.org/W6680138615","https://openalex.org/W6836765637"],"related_works":["https://openalex.org/W2767573821","https://openalex.org/W1980349267","https://openalex.org/W2139611791","https://openalex.org/W2077986289","https://openalex.org/W4251160711","https://openalex.org/W4231839681","https://openalex.org/W2611789520","https://openalex.org/W2098419840","https://openalex.org/W2140610743","https://openalex.org/W2116326546"],"abstract_inverted_index":{"An":[0],"algorithm":[1],"and":[2],"architecture":[3,84],"for":[4,78],"a":[5,33,74],"hardware":[6,108],"based":[7,35],"simulation":[8,18],"accelerator":[9,13],"is":[10,63],"presented.":[11],"The":[12,28,82],"can":[14],"perform":[15],"full":[16],"timing":[17],"of":[19,32,59,67],"synchronous":[20],"digital":[21],"circuits":[22,100],"described":[23],"at":[24,70],"the":[25,45,50,57,68,79,105],"gate":[26],"level.":[27],"simulator":[29],"makes":[30],"use":[31],"cycle":[34],"processor":[36],"core":[37],"in":[38,54],"conjunction":[39],"with":[40,107],"event":[41,61],"queues":[42,62],"to":[43,89,103],"execute":[44],"simulation.":[46],"By":[47],"ensuring":[48],"that":[49],"gates":[51,69],"are":[52,101],"evaluated":[53],"rank":[55],"order,":[56],"problem":[58],"sorting":[60],"avoided.":[64],"Static":[65],"scheduling":[66],"compile":[71],"time":[72],"allows":[73,85],"simple":[75,83,94],"control":[76],"structure":[77],"run":[80],"time.":[81],"large":[86],"processing":[87],"arrays":[88],"be":[90],"implemented":[91],"on":[92,97],"relatively":[93],"hardware.":[95],"Results":[96],"ISCAS89":[98],"benchmark":[99],"presented":[102],"demonstrate":[104],"scalability":[106],"resources.":[109]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
