{"id":"https://openalex.org/W1989240008","doi":"https://doi.org/10.1109/fpl.2007.4380763","title":"A resource optimized SoC Kit for FPGAs","display_name":"A resource optimized SoC Kit for FPGAs","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W1989240008","doi":"https://doi.org/10.1109/fpl.2007.4380763","mag":"1989240008"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2007.4380763","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380763","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046466505","display_name":"Gerald Hempel","orcid":"https://orcid.org/0000-0002-4737-8612"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Gerald Hempel","raw_affiliation_strings":["Chair for Embedded Systems, Dresden University of Technology, Dresden, Germany","Dresden University of Technology, Dresden"],"affiliations":[{"raw_affiliation_string":"Chair for Embedded Systems, Dresden University of Technology, Dresden, Germany","institution_ids":[]},{"raw_affiliation_string":"Dresden University of Technology, Dresden","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005076278","display_name":"Christian Hochberger","orcid":"https://orcid.org/0000-0001-5516-7826"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Christian Hochberger","raw_affiliation_strings":["Chair for Embedded Systems, Dresden University of Technology, Dresden, Germany","Dresden University of Technology, Dresden"],"affiliations":[{"raw_affiliation_string":"Chair for Embedded Systems, Dresden University of Technology, Dresden, Germany","institution_ids":[]},{"raw_affiliation_string":"Dresden University of Technology, Dresden","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5046466505"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3158,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.60625,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"761","last_page":"764"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7984995245933533},{"id":"https://openalex.org/keywords/usable","display_name":"USable","score":0.7155897617340088},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6801062226295471},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.676998496055603},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6336790323257446},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.6118810176849365},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.5834393501281738},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.5750623345375061},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5002613067626953},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07710546255111694}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7984995245933533},{"id":"https://openalex.org/C2780615836","wikidata":"https://www.wikidata.org/wiki/Q2471869","display_name":"USable","level":2,"score":0.7155897617340088},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6801062226295471},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.676998496055603},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6336790323257446},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.6118810176849365},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.5834393501281738},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.5750623345375061},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5002613067626953},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07710546255111694},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C136764020","wikidata":"https://www.wikidata.org/wiki/Q466","display_name":"World Wide Web","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2007.4380763","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380763","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1541457918","https://openalex.org/W2532977569","https://openalex.org/W6632436631"],"related_works":["https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W2984236338","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2141823036","https://openalex.org/W1828239946","https://openalex.org/W2502691491","https://openalex.org/W3142211975"],"abstract_inverted_index":{"Modern":[0],"FPGAs":[1],"have":[2],"become":[3],"so":[4],"affordable":[5],"that":[6],"they":[7],"can":[8],"be":[9],"used":[10],"to":[11,56,77],"substitute":[12],"ASICs":[13],"in":[14],"mass":[15],"produced":[16],"devices.":[17],"A":[18],"key":[19],"component":[20],"of":[21],"such":[22],"configurable":[23],"system":[24],"on":[25,67],"a":[26,47],"chip":[27],"(CSoC)":[28],"is":[29,46],"the":[30],"processor":[31],"core.":[32],"Available":[33],"and":[34,71,74],"usable":[35],"cores":[36],"are":[37],"either":[38],"32":[39],"or":[40],"8":[41],"bit":[42],"wide.":[43],"Thus,":[44],"there":[45],"gap":[48],"between":[49],"these":[50],"two":[51],"extremes,":[52],"which":[53],"we":[54,65],"want":[55],"fill":[57],"with":[58],"our":[59,68],"SoC":[60,69,79],"kit.":[61],"In":[62],"this":[63],"contribution":[64],"elaborate":[66],"kit":[70],"its":[72],"components":[73],"compare":[75],"it":[76],"other":[78],"design":[80],"environments.":[81]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
