{"id":"https://openalex.org/W2066190939","doi":"https://doi.org/10.1109/fpl.2007.4380726","title":"Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores","display_name":"Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2066190939","doi":"https://doi.org/10.1109/fpl.2007.4380726","mag":"2066190939"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2007.4380726","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380726","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5110900114","display_name":"Andrew G. Schmidt","orcid":null},"institutions":[{"id":"https://openalex.org/I146416000","display_name":"University of Kansas","ror":"https://ror.org/001tmjg57","country_code":"US","type":"education","lineage":["https://openalex.org/I146416000"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Andrew G. Schmidt","raw_affiliation_strings":["Ittc, University of Kansas, Lawrence, KS, USA","Univ. of Kansas, Irving"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Ittc, University of Kansas, Lawrence, KS, USA","institution_ids":["https://openalex.org/I146416000"]},{"raw_affiliation_string":"Univ. of Kansas, Irving","institution_ids":["https://openalex.org/I146416000"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5106082786","display_name":"Ron Sass","orcid":null},"institutions":[{"id":"https://openalex.org/I102149020","display_name":"University of North Carolina at Charlotte","ror":"https://ror.org/04dawnj30","country_code":"US","type":"education","lineage":["https://openalex.org/I102149020"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ron Sass","raw_affiliation_strings":["Reconfigurable Computing Systems Laboratory, University of North Carolina, Charlotte, Charlotte, NC, USA","Reconfigurable Computing Systems Lab, University of North Carolina, Charlotte, 9201 University City Blvd., Charlotte, NC 28223-0001. email: rsass@uncc.edu"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Reconfigurable Computing Systems Laboratory, University of North Carolina, Charlotte, Charlotte, NC, USA","institution_ids":["https://openalex.org/I102149020"]},{"raw_affiliation_string":"Reconfigurable Computing Systems Lab, University of North Carolina, Charlotte, 9201 University City Blvd., Charlotte, NC 28223-0001. email: rsass@uncc.edu","institution_ids":["https://openalex.org/I102149020"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6369,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.71330209,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"601","last_page":"604"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8232305645942688},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.6954412460327148},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.6681796908378601},{"id":"https://openalex.org/keywords/memory-bandwidth","display_name":"Memory bandwidth","score":0.528267502784729},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.5205284357070923},{"id":"https://openalex.org/keywords/system-bus","display_name":"System bus","score":0.48677754402160645},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47197800874710083},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.43881407380104065},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.42942774295806885},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4091610908508301},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.35793063044548035},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.26527947187423706},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.26039919257164},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20956653356552124},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.15285447239875793},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09288686513900757}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8232305645942688},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.6954412460327148},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.6681796908378601},{"id":"https://openalex.org/C188045654","wikidata":"https://www.wikidata.org/wiki/Q17148339","display_name":"Memory bandwidth","level":2,"score":0.528267502784729},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.5205284357070923},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.48677754402160645},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47197800874710083},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.43881407380104065},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42942774295806885},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4091610908508301},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.35793063044548035},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.26527947187423706},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.26039919257164},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20956653356552124},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.15285447239875793},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09288686513900757}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2007.4380726","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380726","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1553214226","https://openalex.org/W1600376710","https://openalex.org/W1983096721","https://openalex.org/W2040129791","https://openalex.org/W2080285119","https://openalex.org/W2124150072","https://openalex.org/W2151333238","https://openalex.org/W2152488972","https://openalex.org/W2158184698","https://openalex.org/W2536173599","https://openalex.org/W4292169167","https://openalex.org/W6635990998"],"related_works":["https://openalex.org/W3120961607","https://openalex.org/W4401568740","https://openalex.org/W2098207691","https://openalex.org/W3148568549","https://openalex.org/W1648516568","https://openalex.org/W361036515","https://openalex.org/W2741067476","https://openalex.org/W2031026393","https://openalex.org/W2063611263","https://openalex.org/W2129718937"],"abstract_inverted_index":{"In":[0],"this":[1,23],"paper":[2,24],"we":[3],"investigate":[4],"several":[5],"common":[6,32],"bus":[7,50,75,94],"architectures":[8,76],"and":[9,18,52,65],"measure":[10],"effective":[11],"bandwidth":[12,86],"between":[13],"High":[14],"Performance":[15],"Computing":[16],"cores":[17,47],"off-chip":[19,119],"memory.":[20],"Contributions":[21],"of":[22,30,41,44,56,87,100],"include":[25],"(i)":[26],"characterizing":[27],"the":[28,42,49,54,84,88,93,118],"behavior":[29],"four":[31],"organizations":[33],"using":[34,121],"off-the-shelf":[35],"IP":[36],"cores,":[37],"(ii)":[38],"an":[39,122],"investigation":[40],"effect":[43],"multiple":[45],"computational":[46],"sharing":[48],"structures,":[51],"(iii)":[53],"development":[55],"a":[57,97],"testing":[58],"methodology":[59],"which":[60],"simulates":[61],"different":[62],"access":[63,117,124],"patterns":[64],"accurately":[66],"measures":[67],"bandwidth.":[68],"The":[69],"results":[70],"show":[71],"that":[72,105],"while":[73],"some":[74],"are":[77],"clearly":[78],"better":[79],"than":[80],"others,":[81],"none":[82],"approach":[83],"theoretical":[85],"memory":[89],"interface.":[90],"Furthermore,":[91],"negotiating":[92],"protocol":[95],"is":[96],"significant":[98],"source":[99],"overhead.":[101],"So":[102],"much":[103],"so":[104],"it":[106],"effectively":[107],"hides":[108],"any":[109],"performance":[110],"one":[111],"might":[112],"gain":[113],"from":[114],"trying":[115],"to":[116],"DRAMs":[120],"\"intelligent\"":[123],"pattern.":[125]},"counts_by_year":[{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
