{"id":"https://openalex.org/W2119105540","doi":"https://doi.org/10.1109/fpl.2007.4380664","title":"A Generalized and Unified SPFD-Based Rewiring Technique","display_name":"A Generalized and Unified SPFD-Based Rewiring Technique","publication_year":2007,"publication_date":"2007-08-01","ids":{"openalex":"https://openalex.org/W2119105540","doi":"https://doi.org/10.1109/fpl.2007.4380664","mag":"2119105540"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2007.4380664","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380664","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5036265450","display_name":"Pongstorn Maidee","orcid":"https://orcid.org/0000-0001-5838-1772"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Pongstorn Maidee","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, United States","Minnesota Univ. Minneapolis"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, United States","institution_ids":["https://openalex.org/I130238516"]},{"raw_affiliation_string":"Minnesota Univ. Minneapolis","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013257804","display_name":"Kia Bazargan","orcid":"https://orcid.org/0000-0003-3624-7366"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kia Bazargan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, United States"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, United States","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5036265450"],"corresponding_institution_ids":["https://openalex.org/I130238516"],"apc_list":null,"apc_paid":null,"fwci":0.6365,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.72442828,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"e81 a","issue":null,"first_page":"305","last_page":"310"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6919246315956116},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5916126370429993},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.5766765475273132},{"id":"https://openalex.org/keywords/sequence","display_name":"Sequence (biology)","score":0.4986989498138428},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.44502121210098267},{"id":"https://openalex.org/keywords/restructuring","display_name":"Restructuring","score":0.42056798934936523},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.41807520389556885},{"id":"https://openalex.org/keywords/quality","display_name":"Quality (philosophy)","score":0.41440096497535706},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.33326393365859985},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.3276359736919403},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23226681351661682},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.09964856505393982},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09834766387939453}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6919246315956116},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5916126370429993},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.5766765475273132},{"id":"https://openalex.org/C2778112365","wikidata":"https://www.wikidata.org/wiki/Q3511065","display_name":"Sequence (biology)","level":2,"score":0.4986989498138428},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.44502121210098267},{"id":"https://openalex.org/C45237549","wikidata":"https://www.wikidata.org/wiki/Q1376796","display_name":"Restructuring","level":2,"score":0.42056798934936523},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.41807520389556885},{"id":"https://openalex.org/C2779530757","wikidata":"https://www.wikidata.org/wiki/Q1207505","display_name":"Quality (philosophy)","level":2,"score":0.41440096497535706},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.33326393365859985},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.3276359736919403},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23226681351661682},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.09964856505393982},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09834766387939453},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C54355233","wikidata":"https://www.wikidata.org/wiki/Q7162","display_name":"Genetics","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2007.4380664","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2007.4380664","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 International Conference on Field Programmable Logic and Applications","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.74.8447","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.74.8447","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.umn.edu/users/kia/Papers/2007/fpl07_spfd.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W351230699","https://openalex.org/W2043169149","https://openalex.org/W2071529508","https://openalex.org/W2091707164","https://openalex.org/W2119719053","https://openalex.org/W2124956691","https://openalex.org/W2161463615","https://openalex.org/W2166795801","https://openalex.org/W2170345039","https://openalex.org/W4232772759","https://openalex.org/W4240367396","https://openalex.org/W4243754499","https://openalex.org/W6673455656","https://openalex.org/W6678515679","https://openalex.org/W6683815411","https://openalex.org/W6684561593"],"related_works":["https://openalex.org/W2126983197","https://openalex.org/W2078506771","https://openalex.org/W2118796996","https://openalex.org/W3147061323","https://openalex.org/W2227166741","https://openalex.org/W2134664711","https://openalex.org/W2365114398","https://openalex.org/W2097806352","https://openalex.org/W2102933388","https://openalex.org/W1965160169"],"abstract_inverted_index":{"Traditionally,":[0],"logic":[1],"synthesis":[2],"constrains":[3],"the":[4,71,74,118,130],"solution":[5],"space":[6],"of":[7,60,62,73,121,125],"later":[8],"design":[9,34,56,75,113],"steps,":[10],"such":[11],"as":[12],"physical":[13],"design,":[14],"because":[15],"they":[16],"are":[17],"applied":[18],"in":[19,85,133,144],"sequence.":[20],"Rewiring":[21],"is":[22,127],"a":[23,27,63,67,80],"technique":[24,83,137],"to":[25,87,109],"restructure":[26],"circuit":[28],"while":[29],"maintaining":[30],"its":[31],"functionality.":[32],"Since":[33],"properties":[35],"and":[36],"objectives":[37],"can":[38,45,97,138],"be":[39,139],"considered":[40],"during":[41],"post-synthesis":[42],"rewiring,":[43],"it":[44,96],"help":[46],"relieve":[47],"constraints":[48],"put":[49],"forth":[50],"by":[51],"decisions":[52],"made":[53],"at":[54],"earlier":[55],"steps.":[57],"The":[58],"extent":[59],"rewiring":[61,64,82,94,99,119,147],"algorithm":[65],"has":[66],"great":[68],"impact":[69],"on":[70],"success":[72],"flow.":[76],"This":[77],"paper":[78],"presents":[79],"powerful":[81],"that":[84],"addition":[86],"unifying":[88],"all":[89],"previously":[90],"proposed":[91],"Set-of-Pairs-of-Functions-to-be-Distinguished":[92],"based":[93],"techniques,":[95],"perform":[98],"with":[100],"more":[101],"than":[102],"one":[103],"wire":[104],"which":[105],"increases":[106],"our":[107],"ability":[108,120],"circumvent":[110],"poorly-decided":[111],"early":[112],"constraints.":[114],"With":[115],"this":[116,134],"ability,":[117],"using":[122],"different":[123],"numbers":[124],"wires":[126],"reported":[128],"for":[129,141],"first":[131],"time":[132],"paper.":[135],"Our":[136],"used":[140],"runtime/quality":[142],"trade-off":[143],"any":[145],"given":[146],"application.":[148]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}