{"id":"https://openalex.org/W2169361782","doi":"https://doi.org/10.1109/fpl.2005.1515832","title":"Next generation architectures and CADfor power aware programmable fabrics","display_name":"Next generation architectures and CADfor power aware programmable fabrics","publication_year":2005,"publication_date":"2005-10-12","ids":{"openalex":"https://openalex.org/W2169361782","doi":"https://doi.org/10.1109/fpl.2005.1515832","mag":"2169361782"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2005.1515832","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515832","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029485426","display_name":"R.P. Bharadwaj","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R.P. Bharadwaj","raw_affiliation_strings":["Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA"],"affiliations":[{"raw_affiliation_string":"Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5029485426"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.2208831,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"735","last_page":"738"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6347801685333252},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6148683428764343},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5964195728302002},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.563368558883667},{"id":"https://openalex.org/keywords/exploit","display_name":"Exploit","score":0.5596896409988403},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.510323703289032},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4815528690814972},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4443182349205017},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09011688828468323}],"concepts":[{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6347801685333252},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6148683428764343},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5964195728302002},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.563368558883667},{"id":"https://openalex.org/C165696696","wikidata":"https://www.wikidata.org/wiki/Q11287","display_name":"Exploit","level":2,"score":0.5596896409988403},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.510323703289032},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4815528690814972},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4443182349205017},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09011688828468323},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2005.1515832","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515832","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.7699999809265137}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1523051745","https://openalex.org/W2114621701","https://openalex.org/W2123400059","https://openalex.org/W2125469204","https://openalex.org/W2136224070","https://openalex.org/W2137978438","https://openalex.org/W2159142998","https://openalex.org/W4249083156"],"related_works":["https://openalex.org/W1612076744","https://openalex.org/W2126857316","https://openalex.org/W2152074211","https://openalex.org/W2129019972","https://openalex.org/W3164085601","https://openalex.org/W1522032972","https://openalex.org/W2113308450","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W2139962137"],"abstract_inverted_index":{"As":[0],"fabrication":[1],"technology":[2,81],"continues":[3],"to":[4,39,77],"scale,":[5],"several":[6],"million":[7],"transistors":[8],"are":[9],"being":[10],"integrated":[11],"in":[12,71],"modern":[13,83],"reconfigurable":[14,84,109],"architectures":[15,22,85,110],"like":[16],"FPGAs.":[17],"This":[18],"has":[19,50,65],"made":[20,51],"such":[21,52],"a":[23,68],"viable":[24],"platform":[25],"for":[26,121],"system":[27,33],"implementation.":[28],"However,":[29],"the":[30,37,43],"luxury":[31],"of":[32,45],"implementation":[34],"along":[35,97,111],"with":[36,98,112],"flexibility":[38],"reprogram":[40],"comes":[41],"at":[42],"cost":[44],"substantial":[46],"hardware":[47],"overhead":[48],"that":[49],"fabrics":[53],"extremely":[54],"power":[55,64,73,91,107,122],"hungry.":[56],"In":[57,75],"current":[58],"nanometer":[59],"designs,":[60],"static":[61,90],"or":[62],"leakage":[63],"emerged":[66],"as":[67,92],"dominant":[69],"component":[70],"total":[72],"consumption.":[74],"order":[76],"evolve":[78],"under":[79],"aggressive":[80],"scaling,":[82],"must":[86],"incorporate":[87],"power,":[88],"especially":[89],"an":[93],"important":[94],"design":[95,114],"variable":[96],"performance,":[99],"density":[100],"etc.":[101],"Our":[102],"present":[103],"research":[104],"work":[105],"explores":[106],"aware":[108],"new":[113],"methodology":[115],"which":[116],"exploits":[117],"novel":[118],"architectural":[119],"features":[120],"savings.":[123]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
