{"id":"https://openalex.org/W2097438829","doi":"https://doi.org/10.1109/fpl.2005.1515816","title":"Performance tuning of iterative algorithms in signal processing","display_name":"Performance tuning of iterative algorithms in signal processing","publication_year":2005,"publication_date":"2005-10-12","ids":{"openalex":"https://openalex.org/W2097438829","doi":"https://doi.org/10.1109/fpl.2005.1515816","mag":"2097438829"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2005.1515816","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515816","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5058876274","display_name":"Z. Pohl","orcid":null},"institutions":[{"id":"https://openalex.org/I4210119419","display_name":"Czech Academy of Sciences, Institute of Information Theory and Automation","ror":"https://ror.org/03h1hsz49","country_code":"CZ","type":"facility","lineage":["https://openalex.org/I202391551","https://openalex.org/I4210119419"]}],"countries":["CZ"],"is_corresponding":true,"raw_author_name":"Z. Pohl","raw_affiliation_strings":["Academy of Sciences of the Czech Republic, Institute of Information Theory and Automation","Institute of Information Theory and Automation, Academy of Sciences\uc2a0of the\uc2a0Czech Republic, Czech Republic"],"affiliations":[{"raw_affiliation_string":"Academy of Sciences of the Czech Republic, Institute of Information Theory and Automation","institution_ids":["https://openalex.org/I4210119419"]},{"raw_affiliation_string":"Institute of Information Theory and Automation, Academy of Sciences\uc2a0of the\uc2a0Czech Republic, Czech Republic","institution_ids":["https://openalex.org/I4210119419"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102934998","display_name":"J. Kadlec","orcid":"https://orcid.org/0000-0001-8699-9406"},"institutions":[{"id":"https://openalex.org/I4210119419","display_name":"Czech Academy of Sciences, Institute of Information Theory and Automation","ror":"https://ror.org/03h1hsz49","country_code":"CZ","type":"facility","lineage":["https://openalex.org/I202391551","https://openalex.org/I4210119419"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"J. Kadlec","raw_affiliation_strings":["Academy of Sciences of the Czech Republic, Institute of Information Theory and Automation","Institute of Information Theory and Automation, Academy of Sciences\uc2a0of the\uc2a0Czech Republic, Czech Republic"],"affiliations":[{"raw_affiliation_string":"Academy of Sciences of the Czech Republic, Institute of Information Theory and Automation","institution_ids":["https://openalex.org/I4210119419"]},{"raw_affiliation_string":"Institute of Information Theory and Automation, Academy of Sciences\uc2a0of the\uc2a0Czech Republic, Czech Republic","institution_ids":["https://openalex.org/I4210119419"]}]},{"author_position":"middle","author":{"id":null,"display_name":"P. Sucha","orcid":null},"institutions":[{"id":"https://openalex.org/I44504214","display_name":"Czech Technical University in Prague","ror":"https://ror.org/03kqpb082","country_code":"CZ","type":"education","lineage":["https://openalex.org/I44504214"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"P. Sucha","raw_affiliation_strings":["CAK, Czech Technical University in Prague, Czech Republic"],"affiliations":[{"raw_affiliation_string":"CAK, Czech Technical University in Prague, Czech Republic","institution_ids":["https://openalex.org/I44504214"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039174863","display_name":"Zden\u011bk Hanz\u00e1lek","orcid":"https://orcid.org/0000-0002-8135-1296"},"institutions":[{"id":"https://openalex.org/I44504214","display_name":"Czech Technical University in Prague","ror":"https://ror.org/03kqpb082","country_code":"CZ","type":"education","lineage":["https://openalex.org/I44504214"]}],"countries":["CZ"],"is_corresponding":false,"raw_author_name":"Z. Hanzalek","raw_affiliation_strings":["CAK, Czech Technical University in Prague"],"affiliations":[{"raw_affiliation_string":"CAK, Czech Technical University in Prague","institution_ids":["https://openalex.org/I44504214"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5058876274"],"corresponding_institution_ids":["https://openalex.org/I4210119419"],"apc_list":null,"apc_paid":null,"fwci":1.8466,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.8589374,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"699","last_page":"702"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7437186241149902},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.7009121775627136},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.653629720211029},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5707680583000183},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.5394739508628845},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5110663175582886},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5080399513244629},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4854143559932709},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.4495958089828491},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.4335471987724304},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3635571002960205},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.355316698551178},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3118841052055359},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15078112483024597}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7437186241149902},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.7009121775627136},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.653629720211029},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5707680583000183},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.5394739508628845},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5110663175582886},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5080399513244629},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4854143559932709},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.4495958089828491},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.4335471987724304},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3635571002960205},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.355316698551178},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3118841052055359},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15078112483024597},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2005.1515816","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515816","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.70.877","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.70.877","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://dce.felk.cvut.cz/hanzalek/publications/Hanzalek05a.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W22632632","https://openalex.org/W1972580129","https://openalex.org/W2011784906","https://openalex.org/W2040414745","https://openalex.org/W2053013213","https://openalex.org/W2053381804","https://openalex.org/W2139431698","https://openalex.org/W2147698585","https://openalex.org/W4231345919"],"related_works":["https://openalex.org/W4240253816","https://openalex.org/W3096456556","https://openalex.org/W2169584677","https://openalex.org/W1485756991","https://openalex.org/W2376218453","https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W2984236338","https://openalex.org/W3028347934","https://openalex.org/W2185692674"],"abstract_inverted_index":{"Presented":[0],"high-level":[1],"synthesis":[2],"describes":[3],"scheduling":[4,55],"for":[5],"wide":[6],"class":[7],"of":[8,37,68,86,93],"DSP":[9,94],"algorithms.":[10,95],"Several":[11],"FPGA":[12],"vendors":[13],"or":[14],"even":[15],"ASIC":[16],"designs":[17],"are":[18],"targeted":[19],"via":[20],"Handel-C":[21],"compiled":[22],"by":[23,53],"Celoxica":[24],"DK3.1":[25],"compiler.":[26],"Using":[27],"the":[28,31,62,66,87,90],"authors'":[29],"approach,":[30],"designer":[32],"can":[33],"easily":[34],"change":[35],"type":[36],"used":[38],"pipelined":[39],"arithmetic":[40,79],"modules":[41],"and":[42,80],"then":[43],"check":[44],"new":[45],"performance.":[46],"The":[47],"optimal":[48],"time":[49],"schedule":[50,63],"is":[51],"found":[52],"cyclic":[54],"using":[56],"integer":[57],"linear":[58],"programming":[59],"while":[60],"minimizing":[61],"period":[64,88],"in":[65,73],"terms":[67],"clock":[69],"cycles.":[70],"Experimental":[71],"results":[72],"HW":[74],"implementation,":[75],"performed":[76],"on":[77,89],"logarithmic":[78],"floating-point":[81],"arithmetic,":[82],"confirm":[83],"significant":[84],"influence":[85],"resulting":[91],"performance":[92]},"counts_by_year":[],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}