{"id":"https://openalex.org/W2116679932","doi":"https://doi.org/10.1109/fpl.2005.1515777","title":"Dynamic reconfiguration with hardwired networks-on-chip on future FPGAs","display_name":"Dynamic reconfiguration with hardwired networks-on-chip on future FPGAs","publication_year":2005,"publication_date":"2005-10-12","ids":{"openalex":"https://openalex.org/W2116679932","doi":"https://doi.org/10.1109/fpl.2005.1515777","mag":"2116679932"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2005.1515777","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515777","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064315592","display_name":"Ronald Hecht","orcid":null},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"R. Hecht","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]},{"raw_affiliation_string":"Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany","institution_ids":["https://openalex.org/I4665924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049304872","display_name":"Stephan Kubisch","orcid":null},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"S. Kubisch","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]},{"raw_affiliation_string":"Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany","institution_ids":["https://openalex.org/I4665924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059619600","display_name":"A. Herrholtz","orcid":null},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"A. Herrholtz","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]},{"raw_affiliation_string":"Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany","institution_ids":["https://openalex.org/I4665924"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103173327","display_name":"Dirk Timmermann","orcid":"https://orcid.org/0000-0001-9267-9695"},"institutions":[{"id":"https://openalex.org/I4665924","display_name":"University of Rostock","ror":"https://ror.org/03zdwsf69","country_code":"DE","type":"education","lineage":["https://openalex.org/I4665924"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"D. Timmermann","raw_affiliation_strings":["Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Applied Microelectronics and Computer Engineering, University of Rostock, Germany","institution_ids":["https://openalex.org/I4665924"]},{"raw_affiliation_string":"Inst. of Appl. Microelectron. & Comput. Eng., Rostock Univ., Rostock-Warnemuende, Germany","institution_ids":["https://openalex.org/I4665924"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5064315592"],"corresponding_institution_ids":["https://openalex.org/I4665924"],"apc_list":null,"apc_paid":null,"fwci":3.0094,"has_fulltext":false,"cited_by_count":33,"citation_normalized_percentile":{"value":0.92402431,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"527","last_page":"530"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.9420583248138428},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7723871469497681},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7461718320846558},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6850159764289856},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.6525279879570007},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.6396322846412659},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.637662947177887},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.6222150325775146},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.572584867477417},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4962669014930725},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.492334246635437},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.46338948607444763},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.4250231981277466},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.19326302409172058}],"concepts":[{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.9420583248138428},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7723871469497681},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7461718320846558},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6850159764289856},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.6525279879570007},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.6396322846412659},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.637662947177887},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.6222150325775146},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.572584867477417},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4962669014930725},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.492334246635437},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.46338948607444763},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.4250231981277466},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.19326302409172058},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2005.1515777","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515777","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.113.4448","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.113.4448","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.imd.uni-rostock.de/veroeff/hecht_fpl05.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W29656961","https://openalex.org/W50153049","https://openalex.org/W1522629133","https://openalex.org/W1528600269","https://openalex.org/W2111263794","https://openalex.org/W2123184444","https://openalex.org/W2165666359","https://openalex.org/W2546067889","https://openalex.org/W4236311389","https://openalex.org/W6601228026","https://openalex.org/W6602026498","https://openalex.org/W6631657223","https://openalex.org/W6684387282"],"related_works":["https://openalex.org/W2204754129","https://openalex.org/W2033923590","https://openalex.org/W4322751528","https://openalex.org/W2376124569","https://openalex.org/W2372348522","https://openalex.org/W2135667768","https://openalex.org/W2517347894","https://openalex.org/W4230458348","https://openalex.org/W3198758847","https://openalex.org/W1581055755"],"abstract_inverted_index":{"Due":[0],"to":[1],"their":[2],"layered":[3],"approach,":[4],"networks-on-chip":[5],"(NoC)":[6],"are":[7],"a":[8,23,30,87,109],"promising":[9],"communication":[10],"backbone":[11],"in":[12,108],"the":[13,82,99],"field":[14],"of":[15,40,50,64,72],"heterogeneous":[16],"dynamically":[17,56],"reconfigurable":[18,46,57],"systems.":[19],"In":[20],"this":[21,51,96],"paper":[22],"future":[24],"FPGA":[25,67],"architecture":[26],"is":[27,68,93],"discussed":[28],"having":[29],"hardwired":[31],"NoC":[32,83],"as":[33],"an":[34,66,73],"additional":[35],"high-level":[36],"routing":[37],"resource.":[38],"Instead":[39],"implementing":[41],"on-chip":[42],"interconnection":[43],"with":[44],"valuable":[45],"resources,":[47],"on":[48,101],"top":[49],"architecture,":[52],"cost-efficient":[53],"statically":[54],"and":[55],"systems":[58],"can":[59],"be":[60],"built.":[61],"The":[62],"concept":[63],"such":[65],"explored":[69],"by":[70],"means":[71],"abstract":[74],"SystemC":[75],"model.":[76],"This":[77],"model":[78],"not":[79],"only":[80],"implements":[81],"but":[84],"also":[85],"permits":[86],"tile":[88],"based":[89],"dynamic":[90,106],"reconfiguration.":[91],"It":[92],"shown,":[94],"that":[95],"approach":[97],"advances":[98],"research":[100],"operating":[102],"system":[103],"support":[104],"for":[105],"reconfiguration":[107],"new":[110],"way.":[111]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2012,"cited_by_count":5}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}
