{"id":"https://openalex.org/W2133965417","doi":"https://doi.org/10.1109/fpl.2005.1515754","title":"An autonomous FPGA-based emulation system for fast fault tolerant evaluation","display_name":"An autonomous FPGA-based emulation system for fast fault tolerant evaluation","publication_year":2005,"publication_date":"2005-10-12","ids":{"openalex":"https://openalex.org/W2133965417","doi":"https://doi.org/10.1109/fpl.2005.1515754","mag":"2133965417"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2005.1515754","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515754","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5067423177","display_name":"C. L\u00f3pez-Ongil","orcid":"https://orcid.org/0000-0001-9451-6611"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"C. Lopez-Ongil","raw_affiliation_strings":["Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]},{"raw_affiliation_string":"Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5039590345","display_name":"M. Garc\u00eda-Valderas","orcid":"https://orcid.org/0000-0003-1615-1607"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"M. Garcia-Valderas","raw_affiliation_strings":["Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]},{"raw_affiliation_string":"Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030100022","display_name":"M. Portela-Garc\u00eda","orcid":"https://orcid.org/0000-0002-4103-0519"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"M. Portela-Garcia","raw_affiliation_strings":["Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]},{"raw_affiliation_string":"Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022411878","display_name":"Luis Entrena","orcid":"https://orcid.org/0000-0001-6021-165X"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"L. Entrena-Arrontes","raw_affiliation_strings":["Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departamento de Tecnolog\u03afa Electr\u00f3nica, Universidad Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]},{"raw_affiliation_string":"Departamento de Tecnologia Electronica, Univ. Carlos III de Madrid, Spain","institution_ids":["https://openalex.org/I50357001"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.4537,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.83672295,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"397","last_page":"402"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.9777941703796387},{"id":"https://openalex.org/keywords/reconfigurability","display_name":"Reconfigurability","score":0.9499468207359314},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.875287652015686},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.7635396718978882},{"id":"https://openalex.org/keywords/hardware-emulation","display_name":"Hardware emulation","score":0.7482051849365234},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7100560665130615},{"id":"https://openalex.org/keywords/flexibility","display_name":"Flexibility (engineering)","score":0.6416966915130615},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.6217750906944275},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.6141617298126221},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.5767149329185486},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.4930705726146698},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35062891244888306},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.20333480834960938},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.17021659016609192}],"concepts":[{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.9777941703796387},{"id":"https://openalex.org/C2780149590","wikidata":"https://www.wikidata.org/wiki/Q7302742","display_name":"Reconfigurability","level":2,"score":0.9499468207359314},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.875287652015686},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.7635396718978882},{"id":"https://openalex.org/C94115699","wikidata":"https://www.wikidata.org/wiki/Q5656406","display_name":"Hardware emulation","level":3,"score":0.7482051849365234},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7100560665130615},{"id":"https://openalex.org/C2780598303","wikidata":"https://www.wikidata.org/wiki/Q65921492","display_name":"Flexibility (engineering)","level":2,"score":0.6416966915130615},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.6217750906944275},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.6141617298126221},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.5767149329185486},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.4930705726146698},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35062891244888306},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.20333480834960938},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.17021659016609192},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpl.2005.1515754","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515754","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W119599369","https://openalex.org/W1529140938","https://openalex.org/W2098513789","https://openalex.org/W2124618076","https://openalex.org/W2131180406","https://openalex.org/W4235799760"],"related_works":["https://openalex.org/W2170071008","https://openalex.org/W2103996454","https://openalex.org/W2106791114","https://openalex.org/W3029775214","https://openalex.org/W2291587020","https://openalex.org/W2390650884","https://openalex.org/W2133965417","https://openalex.org/W2118560622","https://openalex.org/W2145233434","https://openalex.org/W2111105659"],"abstract_inverted_index":{"Platform":[0],"FPGAs":[1,101],"provide":[2],"a":[3,9,110],"high":[4,10],"degree":[5],"of":[6,12,129],"reconfigurability":[7],"and":[8,24,60,75,114],"density":[11],"integration.":[13],"These":[14],"features":[15],"make":[16],"these":[17],"devices":[18],"very":[19],"suitable":[20],"for":[21,27],"hardware":[22,95,138],"emulation":[23,67,83,112,123],"in":[25,87,98,119],"particular":[26],"fault":[28,40],"tolerance":[29,41],"evaluation.":[30],"There":[31],"are":[32,52],"several":[33],"FPGA-based":[34],"approaches":[35],"that":[36],"enhance":[37],"notably":[38],"the":[39,55,58,61,66,78,107,120],"evaluation":[42],"process":[43,124],"achieving":[44],"an":[45,81],"important":[46],"speed":[47],"up.":[48],"However,":[49],"such":[50,102],"methods":[51],"limited":[53],"by":[54],"communication":[56,74],"between":[57],"FPGA":[59],"host":[62],"computer,":[63],"which":[64],"manages":[65],"process.":[68],"In":[69,106],"order":[70],"to":[71,126,136],"minimize":[72],"this":[73,88],"therefore":[76],"accelerate":[77],"overall":[79],"process,":[80],"autonomous":[82],"system":[84],"is":[85,117],"proposed":[86,108],"paper.":[89],"This":[90],"solution":[91],"profits":[92],"from":[93],"additional":[94],"resources":[96],"available":[97],"current":[99],"platform":[100],"as":[103],"embedded":[104,118],"RAM.":[105],"system,":[109],"complete":[111],"campaign":[113],"its":[115],"management":[116],"FPGA,":[121],"accelerating":[122],"up":[125],"two":[127],"orders":[128],"magnitude":[130],"without":[131],"losing":[132],"flexibility":[133],"with":[134],"respect":[135],"other":[137],"solutions.":[139]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}