{"id":"https://openalex.org/W2124334694","doi":"https://doi.org/10.1109/fpl.2005.1515731","title":"Defect-tolerant fpga switch block and connection block with fine-grain redundancy for yield enhancement","display_name":"Defect-tolerant fpga switch block and connection block with fine-grain redundancy for yield enhancement","publication_year":2005,"publication_date":"2005-10-12","ids":{"openalex":"https://openalex.org/W2124334694","doi":"https://doi.org/10.1109/fpl.2005.1515731","mag":"2124334694"},"language":"en","primary_location":{"id":"doi:10.1109/fpl.2005.1515731","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515731","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042724312","display_name":"Aopei Yu","orcid":"https://orcid.org/0009-0001-5636-7165"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"A.J. Yu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","Dept. of Electr. & Comput. Eng., British Columbia Univ., Canada#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., British Columbia Univ., Canada#TAB#","institution_ids":["https://openalex.org/I141945490"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071113717","display_name":"Guy Lemieux","orcid":"https://orcid.org/0000-0002-7924-8695"},"institutions":[{"id":"https://openalex.org/I141945490","display_name":"University of British Columbia","ror":"https://ror.org/03rmrcq20","country_code":"CA","type":"education","lineage":["https://openalex.org/I141945490"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"G.G.F. Lemieux","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","Dept. of Electr. & Comput. Eng., British Columbia Univ., Canada#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of British Columbia, Vancouver, BC, Canada","institution_ids":["https://openalex.org/I141945490"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., British Columbia Univ., Canada#TAB#","institution_ids":["https://openalex.org/I141945490"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.4514,"has_fulltext":false,"cited_by_count":49,"citation_normalized_percentile":{"value":0.95820932,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"255","last_page":"262"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6824048757553101},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6709616780281067},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6357064247131348},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5704869627952576},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5661011934280396},{"id":"https://openalex.org/keywords/logic-block","display_name":"Logic block","score":0.5395909547805786},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.5273880958557129},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.5152721405029297},{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.5106268525123596},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4662303924560547},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4428393244743347},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.41975992918014526},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.41954994201660156},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.41229164600372314},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.268535315990448},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.2555667757987976},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.17590290307998657},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15053927898406982},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.09558579325675964}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6824048757553101},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6709616780281067},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6357064247131348},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5704869627952576},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5661011934280396},{"id":"https://openalex.org/C2778325283","wikidata":"https://www.wikidata.org/wiki/Q1125244","display_name":"Logic block","level":3,"score":0.5395909547805786},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.5273880958557129},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.5152721405029297},{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.5106268525123596},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4662303924560547},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4428393244743347},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.41975992918014526},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.41954994201660156},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.41229164600372314},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.268535315990448},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.2555667757987976},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.17590290307998657},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15053927898406982},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.09558579325675964},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/fpl.2005.1515731","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpl.2005.1515731","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"International Conference on Field Programmable Logic and Applications, 2005.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.380.906","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.380.906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ece.ubc.ca/~lemieux/publications/yu-fpl2005.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1522950391","https://openalex.org/W1905355278","https://openalex.org/W1960026154","https://openalex.org/W1967542252","https://openalex.org/W1983346512","https://openalex.org/W2003452683","https://openalex.org/W2030641935","https://openalex.org/W2068920660","https://openalex.org/W2101472024","https://openalex.org/W2110864115","https://openalex.org/W2116094656","https://openalex.org/W2125719425","https://openalex.org/W2138840350","https://openalex.org/W2145767822","https://openalex.org/W6640961583"],"related_works":["https://openalex.org/W2376859990","https://openalex.org/W2912704652","https://openalex.org/W2381161177","https://openalex.org/W4323268213","https://openalex.org/W2319226115","https://openalex.org/W830772239","https://openalex.org/W2970750595","https://openalex.org/W2366601680","https://openalex.org/W3162750006","https://openalex.org/W3215027316"],"abstract_inverted_index":{"Future":[0],"process":[1],"nodes":[2],"have":[3,117],"such":[4],"small":[5],"feature":[6],"sizes":[7,161],"that":[8,108],"there":[9],"will":[10,26],"be":[11,27,134,139],"an":[12,75],"increase":[13],"in":[14,197],"the":[15,44,113,181,189],"number":[16,40],"of":[17,41,48,162,193],"manufacturing":[18],"defects":[19,32,57,157,179],"per":[20],"die.":[21],"For":[22],"large":[23,159],"FPGAs,":[24],"it":[25],"critical":[28],"to":[29,43,51,93,95,103,133],"tolerate":[30,52,96,152,177],"multiple":[31,53],"(Campregher":[33],"et":[34],"al.,":[35],"2005).":[36],"We":[37],"propose":[38],"a":[39,70],"changes":[42],"detailed":[45,191],"routing":[46,114],"architecture":[47],"island-style":[49],"FPGAs":[50],"random,":[54],"distributed":[55],"interconnect":[56,156],"without":[58],"re-routing":[59],"and":[60],"with":[61],"minimal":[62],"impact":[63],"on":[64],"signal":[65],"timing.":[66],"Our":[67,149],"scheme":[68],"is":[69,125,188],"user":[71],"option":[72],"prebuilt":[73],"into":[74],"architecture,":[76],"requiring":[77],"+11%":[78],"area":[79],"for":[80,158],"additional":[81],"multiplexers.":[82],"Unused":[83],"(spare)":[84],"wiring":[85],"tracks":[86,119],"are":[87,131,147,173],"also":[88],"needed,":[89],"bringing":[90],"total":[91],"overhead":[92],"24%":[94],"stuck-at":[97],"or":[98,101],"open":[99],"faults,":[100],"34%":[102],"include":[104],"bridging.":[105],"User":[106],"circuits":[107],"do":[109],"not":[110],"fully":[111],"stress":[112],"network":[115],"already":[116],"these":[118],"freely":[120],"available.":[121],"The":[122],"delay":[123],"penalty":[124],"programmable:":[126],"5-10%":[127],"if":[128,144],"defect":[129,145],"rates":[130,146],"expected":[132],"sufficiently":[135],"low,":[136],"but":[137],"can":[138,151],"as":[140,142,180],"high":[141],"25%":[143],"high.":[148],"schemes":[150,172,196],"more":[153,178],"than":[154],"10":[155],"array":[160,183],"128":[163],"/spl":[164],"times/":[165],"128.":[166],"Unlike":[167],"row/column":[168],"redundancy":[169],"schemes,":[170],"our":[171],"scalable:":[174],"they":[175],"naturally":[176],"FPGA":[182],"size":[184],"increases.":[185],"This":[186],"work":[187],"first":[190],"analysis":[192],"fine-grained":[194],"defect-tolerant":[195],"FPGAs.":[198]},"counts_by_year":[{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":7},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":2}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
