{"id":"https://openalex.org/W1665429980","doi":"https://doi.org/10.1109/fpga.2003.1227255","title":"Tradeoffs of designing floating-point division and square root on Virtex FPGAs","display_name":"Tradeoffs of designing floating-point division and square root on Virtex FPGAs","publication_year":2003,"publication_date":"2003-10-31","ids":{"openalex":"https://openalex.org/W1665429980","doi":"https://doi.org/10.1109/fpga.2003.1227255","mag":"1665429980"},"language":"en","primary_location":{"id":"doi:10.1109/fpga.2003.1227255","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpga.2003.1227255","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100346006","display_name":"Xiaojun Wang","orcid":"https://orcid.org/0000-0002-6802-2623"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Xiaojun Wang","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5087430192","display_name":"Brent Nelson","orcid":"https://orcid.org/0000-0002-7523-3269"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"B.E. Nelson","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100346006"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.6725,"has_fulltext":false,"cited_by_count":57,"citation_normalized_percentile":{"value":0.96344677,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"195","last_page":"203"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7960268259048462},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7200532555580139},{"id":"https://openalex.org/keywords/virtex","display_name":"Virtex","score":0.7174199819564819},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6406968832015991},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5576754808425903},{"id":"https://openalex.org/keywords/division","display_name":"Division (mathematics)","score":0.5420686602592468},{"id":"https://openalex.org/keywords/square-root","display_name":"Square root","score":0.5393741726875305},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.5271555781364441},{"id":"https://openalex.org/keywords/low-latency","display_name":"Low latency (capital markets)","score":0.49621134996414185},{"id":"https://openalex.org/keywords/double-precision-floating-point-format","display_name":"Double-precision floating-point format","score":0.4237251281738281},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.4231055676937103},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3812830150127411},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37601834535598755},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3595486283302307},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.18049976229667664},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.15938609838485718},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11360660195350647},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08176189661026001},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.07609397172927856},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07580581307411194}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7960268259048462},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7200532555580139},{"id":"https://openalex.org/C2777674469","wikidata":"https://www.wikidata.org/wiki/Q20741011","display_name":"Virtex","level":3,"score":0.7174199819564819},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6406968832015991},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5576754808425903},{"id":"https://openalex.org/C60798267","wikidata":"https://www.wikidata.org/wiki/Q1226939","display_name":"Division (mathematics)","level":2,"score":0.5420686602592468},{"id":"https://openalex.org/C11577676","wikidata":"https://www.wikidata.org/wiki/Q134237","display_name":"Square root","level":2,"score":0.5393741726875305},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.5271555781364441},{"id":"https://openalex.org/C46637626","wikidata":"https://www.wikidata.org/wiki/Q6693015","display_name":"Low latency (capital markets)","level":2,"score":0.49621134996414185},{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.4237251281738281},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.4231055676937103},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3812830150127411},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37601834535598755},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3595486283302307},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.18049976229667664},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.15938609838485718},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11360660195350647},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08176189661026001},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.07609397172927856},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07580581307411194},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpga.2003.1227255","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpga.2003.1227255","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W3215589575","https://openalex.org/W2336476964","https://openalex.org/W3150959508","https://openalex.org/W1571090276","https://openalex.org/W2773283032","https://openalex.org/W2239119680","https://openalex.org/W2012407419","https://openalex.org/W1973800584","https://openalex.org/W162485434","https://openalex.org/W2365433197"],"abstract_inverted_index":{"Low":[0],"latency,":[1],"high":[2,26,75],"throughput":[3,76,107],"and":[4,31,50,70,106],"small":[5],"area":[6],"are":[7,86],"three":[8,40],"major":[9],"design":[10,94],"considerations":[11],"of":[12,42,81,95],"an":[13],"FPGA":[14],"(field":[15],"programmable":[16],"gate":[17],"array)":[18],"design.":[19],"In":[20,90],"this":[21],"paper,":[22],"we":[23,97],"present":[24],"a":[25,32,47,58,65,74],"radix":[27],"SRT":[28],"division":[29,44],"algorithm":[30],"binary":[33],"restoring":[34],"square":[35,83],"root":[36,84],"algorithm.":[37],"We":[38],"describe":[39],"implementations":[41,80],"floating-point":[43,82],"operations":[45,85],"with":[46,108],"variable":[48],"width":[49],"precision":[51],"based":[52],"on":[53,110],"Virtex-2":[54],"FPGAs.":[55],"One":[56],"is":[57,64,73],"low":[59,66],"cost":[60,115],"iterative":[61],"implementation;":[62,69],"another":[63],"latency":[67,105],"array":[68],"the":[71,93,100,103,114,118],"third":[72],"pipelined":[77],"implementation.":[78],"The":[79],"presented":[87],"as":[88],"well.":[89],"addition":[91],"to":[92,112],"modules,":[96],"also":[98],"analyze":[99],"tradeoffs":[101],"among":[102],"cost,":[104],"strategies":[109],"how":[111],"reduce":[113],"or":[116],"improve":[117],"performance.":[119]},"counts_by_year":[{"year":2020,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
