{"id":"https://openalex.org/W1586552561","doi":"https://doi.org/10.1109/fpga.2002.1106688","title":"Fast and guaranteed C compilation onto the PACT-XPP/spl trade/ reconfigurable computing platform","display_name":"Fast and guaranteed C compilation onto the PACT-XPP/spl trade/ reconfigurable computing platform","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1586552561","doi":"https://doi.org/10.1109/fpga.2002.1106688","mag":"1586552561"},"language":"en","primary_location":{"id":"doi:10.1109/fpga.2002.1106688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpga.2002.1106688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5007667456","display_name":"Jo\u00e3o M. P. Cardoso","orcid":"https://orcid.org/0000-0002-7353-1799"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"J.M.P. Cardoso","raw_affiliation_strings":["PACT Informationstechnologie AG, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"PACT Informationstechnologie AG, Munich, Germany","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5081481315","display_name":"Markus Weinhardt","orcid":"https://orcid.org/0000-0003-1445-1382"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Weinhardt","raw_affiliation_strings":["PACT Informationstechnologie AG, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"PACT Informationstechnologie AG, Munich, Germany","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5007667456"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.2515,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.50745251,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"291","last_page":"292"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/pact","display_name":"Pact","score":0.7356395721435547},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6006052494049072},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3951927721500397},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38748300075531006}],"concepts":[{"id":"https://openalex.org/C2779073994","wikidata":"https://www.wikidata.org/wiki/Q1751686","display_name":"Pact","level":2,"score":0.7356395721435547},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6006052494049072},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3951927721500397},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38748300075531006},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fpga.2002.1106688","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fpga.2002.1106688","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5099999904632568,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W2038198320","https://openalex.org/W2097169784","https://openalex.org/W2117099910","https://openalex.org/W2135050419","https://openalex.org/W2293225001","https://openalex.org/W4250486818","https://openalex.org/W6674767567"],"related_works":["https://openalex.org/W1604898313","https://openalex.org/W2117014006","https://openalex.org/W4233815414","https://openalex.org/W2372170743","https://openalex.org/W1491899005","https://openalex.org/W1558545464","https://openalex.org/W2172791042","https://openalex.org/W1502414128","https://openalex.org/W1984303163","https://openalex.org/W1509211761"],"abstract_inverted_index":{"We":[0],"introduce":[1],"the":[2,11,19,36,39,45,53,61,87,91,109,116],"XPP-VC":[3,137],"high-level":[4],"compiler,":[5],"which":[6],"maps":[7],"C":[8],"programs":[9,43],"to":[10,81,89,126,129,143],"coarse-grained":[12],"XPP":[13,49,117],"architecture.":[14],"XPP-VC's":[15],"main":[16],"feature":[17],"is":[18,99,118],"integration":[20],"of":[21,41,47,63,136],"pipeline":[22],"vectorization":[23],"and":[24,35],"temporal":[25],"partitioning":[26],"techniques.":[27],"The":[28,68],"former":[29],"provides":[30],"high-throughput":[31],"inner":[32],"loop":[33],"computations":[34],"later":[37],"allows":[38],"compilation":[40,97,142],"large":[42],"or":[44,124],"use":[46],"fewer":[48],"processing":[50],"elements.":[51],"Although":[52],"preliminary":[54],"results":[55],"are":[56,65,79],"very":[57],"encouraging,":[58],"improvements":[59],"on":[60],"generation":[62],"configurations":[64],"still":[66,111],"required.":[67],"evaluation":[69],"we":[70],"have":[71],"conducted":[72],"shows":[73],"that":[74],"only":[75],"a":[76,130,133],"few":[77],"seconds":[78],"required":[80],"generate,":[82],"from":[83],"algorithms":[84],"in":[85],"C,":[86],"binaries":[88],"program":[90],"XPP.":[92],"To":[93],"our":[94],"knowledge":[95],"this":[96],"performance":[98],"unmatched":[100],"by":[101],"any":[102],"other":[103],"compiler":[104,110],"targeting":[105],"reconfigurable":[106],"architectures.":[107,146],"Moreover":[108],"achieves":[112],"high-performance":[113],"implementations.":[114],"Since":[115],"delivered":[119],"as":[120],"an":[121],"IP":[122],"core":[123],"device":[125],"be":[127],"coupled":[128],"host":[131],"processor,":[132],"future":[134],"version":[135],"will":[138],"consider":[139],"co-compilation,":[140],"i.e.,":[141],"hybrid":[144],"microprocessor/XPP":[145]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
