{"id":"https://openalex.org/W4308096266","doi":"https://doi.org/10.1109/fdl56239.2022.9925667","title":"A Comparison of Virtual Platform Simulation Solutions for Timing Prediction of Small RISC-V Based SoCs","display_name":"A Comparison of Virtual Platform Simulation Solutions for Timing Prediction of Small RISC-V Based SoCs","publication_year":2022,"publication_date":"2022-09-14","ids":{"openalex":"https://openalex.org/W4308096266","doi":"https://doi.org/10.1109/fdl56239.2022.9925667"},"language":"en","primary_location":{"id":"doi:10.1109/fdl56239.2022.9925667","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fdl56239.2022.9925667","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 Forum on Specification & Design Languages (FDL)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5015963870","display_name":"Felix B\u00f6seler","orcid":null},"institutions":[{"id":"https://openalex.org/I202367325","display_name":"Oldenburger Institut f\u00fcr Informatik","ror":"https://ror.org/003sav189","country_code":"DE","type":"facility","lineage":["https://openalex.org/I202367325"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Felix Boseler","raw_affiliation_strings":["OFFIS - Institute for Information Technology,Oldenburg,Germany","OFFIS - Institute for Information Technology, Oldenburg, Germany"],"affiliations":[{"raw_affiliation_string":"OFFIS - Institute for Information Technology,Oldenburg,Germany","institution_ids":["https://openalex.org/I202367325"]},{"raw_affiliation_string":"OFFIS - Institute for Information Technology, Oldenburg, Germany","institution_ids":["https://openalex.org/I202367325"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112526412","display_name":"J\u00f6rg Walter","orcid":null},"institutions":[{"id":"https://openalex.org/I202367325","display_name":"Oldenburger Institut f\u00fcr Informatik","ror":"https://ror.org/003sav189","country_code":"DE","type":"facility","lineage":["https://openalex.org/I202367325"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jorg Walter","raw_affiliation_strings":["OFFIS - Institute for Information Technology,Oldenburg,Germany","OFFIS - Institute for Information Technology, Oldenburg, Germany"],"affiliations":[{"raw_affiliation_string":"OFFIS - Institute for Information Technology,Oldenburg,Germany","institution_ids":["https://openalex.org/I202367325"]},{"raw_affiliation_string":"OFFIS - Institute for Information Technology, Oldenburg, Germany","institution_ids":["https://openalex.org/I202367325"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036348895","display_name":"Behnam Razi Perjikolaei","orcid":null},"institutions":[{"id":"https://openalex.org/I202367325","display_name":"Oldenburger Institut f\u00fcr Informatik","ror":"https://ror.org/003sav189","country_code":"DE","type":"facility","lineage":["https://openalex.org/I202367325"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Behnam Razi Perjikolaei","raw_affiliation_strings":["OFFIS - Institute for Information Technology,Oldenburg,Germany","OFFIS - Institute for Information Technology, Oldenburg, Germany"],"affiliations":[{"raw_affiliation_string":"OFFIS - Institute for Information Technology,Oldenburg,Germany","institution_ids":["https://openalex.org/I202367325"]},{"raw_affiliation_string":"OFFIS - Institute for Information Technology, Oldenburg, Germany","institution_ids":["https://openalex.org/I202367325"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5015963870"],"corresponding_institution_ids":["https://openalex.org/I202367325"],"apc_list":null,"apc_paid":null,"fwci":0.4145,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.63045043,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7620894908905029},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.7159298658370972},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.6510030627250671},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5265042185783386},{"id":"https://openalex.org/keywords/database-transaction","display_name":"Database transaction","score":0.4882195293903351},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4814307391643524},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4730474352836609},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.47043153643608093},{"id":"https://openalex.org/keywords/measure","display_name":"Measure (data warehouse)","score":0.4653618633747101},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4484250843524933},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.44466933608055115},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.362060546875},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20392513275146484},{"id":"https://openalex.org/keywords/database","display_name":"Database","score":0.11305198073387146},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.08399009704589844}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7620894908905029},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.7159298658370972},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.6510030627250671},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5265042185783386},{"id":"https://openalex.org/C75949130","wikidata":"https://www.wikidata.org/wiki/Q848010","display_name":"Database transaction","level":2,"score":0.4882195293903351},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4814307391643524},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4730474352836609},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.47043153643608093},{"id":"https://openalex.org/C2780009758","wikidata":"https://www.wikidata.org/wiki/Q6804172","display_name":"Measure (data warehouse)","level":2,"score":0.4653618633747101},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4484250843524933},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.44466933608055115},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.362060546875},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20392513275146484},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.11305198073387146},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.08399009704589844},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fdl56239.2022.9925667","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fdl56239.2022.9925667","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 Forum on Specification & Design Languages (FDL)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320311687","display_name":"Ministry of Education","ror":"https://ror.org/03m01yf64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2538644970","https://openalex.org/W2128502296","https://openalex.org/W4376881175","https://openalex.org/W4310584696","https://openalex.org/W4237840813","https://openalex.org/W4385730960","https://openalex.org/W2496196108","https://openalex.org/W2993622674","https://openalex.org/W1833044483","https://openalex.org/W2171594157"],"abstract_inverted_index":{"In":[0],"an":[1],"electronic":[2],"system":[3],"level":[4,21],"design":[5],"flow,":[6],"early":[7],"timing":[8,53,104],"predictions":[9],"can":[10],"be":[11],"realized":[12],"by":[13],"employing":[14],"virtual":[15,29],"platform":[16,30],"simulations":[17],"in":[18,88],"the":[19],"transaction":[20],"abstraction.":[22],"However,":[23],"there":[24],"is":[25],"little":[26],"research":[27,78],"comparing":[28],"solutions":[31],"for":[32,77],"small":[33],"RISC-V":[34,63],"based":[35],"System-on-a-Chip":[36,95],"architectures.":[37],"This":[38],"paper":[39],"tries":[40],"to":[41],"fill":[42],"this":[43],"gap":[44],"with":[45,57],"a":[46,58,72,85,92],"qualitative":[47],"and":[48,100,107],"quantitative":[49,86],"comparison":[50,87],"focusing":[51],"on":[52],"prediction":[54,105],"accuracy.":[55],"Starting":[56],"total":[59],"list":[60],"of":[61,75],"25":[62],"simulators,":[64],"we":[65,83,90],"found":[66],"that":[67],"only":[68],"three":[69],"candidates":[70,82],"fulfill":[71],"comprehensive":[73],"set":[74],"requirements":[76],"applications.":[79],"For":[80],"these":[81],"performed":[84],"which":[89],"model":[91],"single-master":[93],"bus-based":[94],"at":[96],"different":[97],"abstraction":[98],"levels":[99],"measure":[101],"each":[102],"simulator\u2019s":[103],"accuracy":[106],"simulation":[108],"speed.":[109]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}