{"id":"https://openalex.org/W2167714151","doi":"https://doi.org/10.1109/fdl.2008.4641456","title":"SpecScribe Analog - A specification tool extension for heterogeneous systems","display_name":"SpecScribe Analog - A specification tool extension for heterogeneous systems","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2167714151","doi":"https://doi.org/10.1109/fdl.2008.4641456","mag":"2167714151"},"language":"en","primary_location":{"id":"doi:10.1109/fdl.2008.4641456","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fdl.2008.4641456","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Forum on Specification, Verification and Design Languages","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010768420","display_name":"Erik Markert","orcid":null},"institutions":[{"id":"https://openalex.org/I2610724","display_name":"Chemnitz University of Technology","ror":"https://ror.org/00a208s56","country_code":"DE","type":"education","lineage":["https://openalex.org/I2610724"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Erik Markert","raw_affiliation_strings":["Chair Circuit and System Design, Chemnitz University of Technology, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair Circuit and System Design, Chemnitz University of Technology, Germany","institution_ids":["https://openalex.org/I2610724"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019808662","display_name":"Uwe Pro\u00df","orcid":null},"institutions":[{"id":"https://openalex.org/I2610724","display_name":"Chemnitz University of Technology","ror":"https://ror.org/00a208s56","country_code":"DE","type":"education","lineage":["https://openalex.org/I2610724"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Uwe Pross","raw_affiliation_strings":["Chair Circuit and System Design, Chemnitz University of Technology"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair Circuit and System Design, Chemnitz University of Technology","institution_ids":["https://openalex.org/I2610724"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001903841","display_name":"Ulrich Heinkel","orcid":null},"institutions":[{"id":"https://openalex.org/I2610724","display_name":"Chemnitz University of Technology","ror":"https://ror.org/00a208s56","country_code":"DE","type":"education","lineage":["https://openalex.org/I2610724"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Ulrich Heinkel","raw_affiliation_strings":["Chair Circuit and System Design, Chemnitz University of Technology, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Chair Circuit and System Design, Chemnitz University of Technology, Germany","institution_ids":["https://openalex.org/I2610724"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I2610724"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16110119,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"243","last_page":"244"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/extension","display_name":"Extension (predicate logic)","score":0.8176261186599731},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8169887065887451},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.6529123187065125},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.6211518049240112},{"id":"https://openalex.org/keywords/automaton","display_name":"Automaton","score":0.6130177974700928},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.5678163170814514},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.49537384510040283},{"id":"https://openalex.org/keywords/formal-specification","display_name":"Formal specification","score":0.48836037516593933},{"id":"https://openalex.org/keywords/system-requirements-specification","display_name":"System requirements specification","score":0.47976598143577576},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.269743949174881},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.2123740017414093},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20991507172584534},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.07530814409255981}],"concepts":[{"id":"https://openalex.org/C2778029271","wikidata":"https://www.wikidata.org/wiki/Q5421931","display_name":"Extension (predicate logic)","level":2,"score":0.8176261186599731},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8169887065887451},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.6529123187065125},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.6211518049240112},{"id":"https://openalex.org/C112505250","wikidata":"https://www.wikidata.org/wiki/Q787116","display_name":"Automaton","level":2,"score":0.6130177974700928},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.5678163170814514},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.49537384510040283},{"id":"https://openalex.org/C116253237","wikidata":"https://www.wikidata.org/wiki/Q1437424","display_name":"Formal specification","level":2,"score":0.48836037516593933},{"id":"https://openalex.org/C84651959","wikidata":"https://www.wikidata.org/wiki/Q17052506","display_name":"System requirements specification","level":2,"score":0.47976598143577576},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.269743949174881},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.2123740017414093},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20991507172584534},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.07530814409255981}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fdl.2008.4641456","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fdl.2008.4641456","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Forum on Specification, Verification and Design Languages","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"display_name":"Partnerships for the goals","id":"https://metadata.un.org/sdg/17"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2126409379","https://openalex.org/W2147340401","https://openalex.org/W2160029502"],"related_works":["https://openalex.org/W1984090905","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2548456620","https://openalex.org/W2139058049","https://openalex.org/W4233602124","https://openalex.org/W2156965212","https://openalex.org/W2075214143","https://openalex.org/W2376018793","https://openalex.org/W2135661730"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,21,40],"tool":[4,53],"extension":[5,50],"named":[6],"SpecScribe":[7,20],"Analog":[8],"for":[9,54],"the":[10,52,55,62],"specification-driven":[11],"design":[12],"of":[13,24,57,64],"heterogeneous":[14],"(analog":[15],"and":[16,67],"digital)":[17],"systems.":[18],"For":[19],"specification":[22],"consists":[23],"atomic":[25],"items":[26],"called":[27],"requirements":[28,35],"which":[29],"can":[30,36],"be":[31,37],"hierarchically":[32],"organized.":[33],"These":[34],"translated":[38],"to":[39,70,80],"more":[41],"implementation":[42,68],"like":[43,73,84],"description":[44,69],"using":[45],"components":[46],"or":[47,75],"FSMs.":[48],"The":[49],"broadens":[51],"usage":[56],"hybrid":[58],"automata.":[59],"It":[60],"allows":[61],"export":[63],"this":[65],"requirement":[66],"common":[71],"languages":[72,83],"SystemC(-AMS)":[74],"VHDL":[76],"as":[77,79],"well":[78],"model":[81],"checking":[82],"(hybrid-)SAL.":[85]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
