{"id":"https://openalex.org/W2140071476","doi":"https://doi.org/10.1109/fdl.2008.4641413","title":"Modelling Program-State Machines in SystemC™","display_name":"Modelling Program-State Machines in SystemC™","publication_year":2008,"publication_date":"2008-09-01","ids":{"openalex":"https://openalex.org/W2140071476","doi":"https://doi.org/10.1109/fdl.2008.4641413","mag":"2140071476"},"language":"en","primary_location":{"id":"doi:10.1109/fdl.2008.4641413","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fdl.2008.4641413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Forum on Specification, Verification and Design Languages","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027858506","display_name":"Kim Gr\u00fcttner","orcid":"https://orcid.org/0000-0002-4988-3858"},"institutions":[{"id":"https://openalex.org/I202367325","display_name":"Oldenburger Institut f\u00fcr Informatik","ror":"https://ror.org/003sav189","country_code":"DE","type":"facility","lineage":["https://openalex.org/I202367325"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Kim Gruttner","raw_affiliation_strings":["OFFIS Research Institute, Oldenburg, Germany","OFFIS Research Institute, Oldenburg#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"OFFIS Research Institute, Oldenburg, Germany","institution_ids":["https://openalex.org/I202367325"]},{"raw_affiliation_string":"OFFIS Research Institute, Oldenburg#TAB#","institution_ids":["https://openalex.org/I202367325"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5048688572","display_name":"Wolfgang Nebel","orcid":null},"institutions":[{"id":"https://openalex.org/I129877168","display_name":"Carl von Ossietzky Universit\u00e4t Oldenburg","ror":"https://ror.org/033n9gh91","country_code":"DE","type":"education","lineage":["https://openalex.org/I129877168"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Wolfgang Nebel","raw_affiliation_strings":["University of Oldenburg, Germany","CvO Univ. of Oldenburg, Oldenburg"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Oldenburg, Germany","institution_ids":["https://openalex.org/I129877168"]},{"raw_affiliation_string":"CvO Univ. of Oldenburg, Oldenburg","institution_ids":["https://openalex.org/I129877168"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"7","last_page":"12"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9573127031326294},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8533056974411011},{"id":"https://openalex.org/keywords/porting","display_name":"Porting","score":0.7411068081855774},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.7352935671806335},{"id":"https://openalex.org/keywords/electronic-system-level-design-and-verification","display_name":"Electronic system-level design and verification","score":0.531030535697937},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.5089349746704102},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.48951971530914307},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.48365744948387146},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4681829512119293},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.44165468215942383},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4377056658267975},{"id":"https://openalex.org/keywords/model-of-computation","display_name":"Model of computation","score":0.4289016127586365},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4077184200286865},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3508569896221161},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3233254551887512},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.225301593542099},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.11126884818077087}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9573127031326294},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8533056974411011},{"id":"https://openalex.org/C106251023","wikidata":"https://www.wikidata.org/wiki/Q851989","display_name":"Porting","level":3,"score":0.7411068081855774},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.7352935671806335},{"id":"https://openalex.org/C77495112","wikidata":"https://www.wikidata.org/wiki/Q5358436","display_name":"Electronic system-level design and verification","level":2,"score":0.531030535697937},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.5089349746704102},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.48951971530914307},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.48365744948387146},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4681829512119293},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.44165468215942383},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4377056658267975},{"id":"https://openalex.org/C184596265","wikidata":"https://www.wikidata.org/wiki/Q2651576","display_name":"Model of computation","level":3,"score":0.4289016127586365},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4077184200286865},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3508569896221161},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3233254551887512},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.225301593542099},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.11126884818077087}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/fdl.2008.4641413","is_oa":false,"landing_page_url":"https://doi.org/10.1109/fdl.2008.4641413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 Forum on Specification, Verification and Design Languages","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1498455513","https://openalex.org/W1658017527","https://openalex.org/W1990819301","https://openalex.org/W2038904603","https://openalex.org/W2099529102","https://openalex.org/W2101361758","https://openalex.org/W2140195933","https://openalex.org/W4285719527","https://openalex.org/W6637039136","https://openalex.org/W7018503414","https://openalex.org/W7043269807"],"related_works":["https://openalex.org/W3206586607","https://openalex.org/W2548514518","https://openalex.org/W2579932084","https://openalex.org/W1984090905","https://openalex.org/W1831349210","https://openalex.org/W4247397443","https://openalex.org/W2133642747","https://openalex.org/W1603163876","https://openalex.org/W2131133849","https://openalex.org/W2141175904"],"abstract_inverted_index":{"The":[0],"Program-State":[1],"Machine":[2],"(PSM)":[3],"unifies":[4],"the":[5,28,31,40,47,74],"concepts":[6],"of":[7,22,30,46,50,76,92],"hierarchical":[8],"concurrent":[9],"finite-state":[10],"machines,":[11],"dataflow":[12],"graphs":[13],"and":[14,42,99],"imperative":[15],"programming":[16],"languages":[17],"in":[18,88],"a":[19,82,108],"single":[20],"model":[21,49,93,111],"computation.":[23],"It":[24,54],"is":[25,55,96,105],"used":[26],"as":[27],"foundation":[29],"SpecC":[32,110],"System":[33,68],"Level":[34,69],"Design":[35],"Language.":[36],"This":[37],"paper":[38],"demonstrates":[39],"obstacles":[41,63],"proposes":[43],"an":[44],"implementation":[45,59,79],"PSM":[48,78],"computation":[51],"using":[52,65],"SystemC.":[53],"shown":[56],"that":[57,101],"this":[58],"overcomes":[60],"some":[61],"fundamental":[62],"when":[64],"SystemC":[66],"for":[67],"Design.":[70],"Furthermore,":[71],"we":[72],"show":[73],"applicability":[75],"our":[77,102],"by":[80],"porting":[81],"JPEG":[83],"encoder":[84],"design":[85],"originally":[86],"implemented":[87],"SpecC.":[89],"A":[90],"comparison":[91],"execution":[94],"time":[95],"very":[97],"promising":[98],"shows":[100],"proposed":[103],"approach":[104],"competitive":[106],"with":[107],"native":[109],"execution.":[112]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}