{"id":"https://openalex.org/W2048266173","doi":"https://doi.org/10.1109/expat.2013.6703060","title":"Integration of a remote lab in a software tool for digital electronics","display_name":"Integration of a remote lab in a software tool for digital electronics","publication_year":2013,"publication_date":"2013-09-01","ids":{"openalex":"https://openalex.org/W2048266173","doi":"https://doi.org/10.1109/expat.2013.6703060","mag":"2048266173"},"language":"en","primary_location":{"id":"doi:10.1109/expat.2013.6703060","is_oa":false,"landing_page_url":"https://doi.org/10.1109/expat.2013.6703060","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 2nd Experiment@ International Conference (exp.at'13)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016172935","display_name":"Javier Garc\u00eda-Zub\u00eda","orcid":"https://orcid.org/0000-0002-4462-8487"},"institutions":[{"id":"https://openalex.org/I136040515","display_name":"Universidad de Deusto","ror":"https://ror.org/00ne6sr39","country_code":"ES","type":"education","lineage":["https://openalex.org/I136040515"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Javier Garcia-Zubia","raw_affiliation_strings":["Faculty of Engineering, University of Deusto, Bilbao, Spain","Fac. of Eng., Univ. of Deusto, Bilbao, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, University of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]},{"raw_affiliation_string":"Fac. of Eng., Univ. of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041755949","display_name":"Ignacio Angulo","orcid":"https://orcid.org/0000-0002-2414-8646"},"institutions":[{"id":"https://openalex.org/I136040515","display_name":"Universidad de Deusto","ror":"https://ror.org/00ne6sr39","country_code":"ES","type":"education","lineage":["https://openalex.org/I136040515"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Ignacio Angulo","raw_affiliation_strings":["Faculty of Engineering, University of Deusto, Bilbao, Spain","Fac. of Eng., Univ. of Deusto, Bilbao, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, University of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]},{"raw_affiliation_string":"Fac. of Eng., Univ. of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102012973","display_name":"Luis Rodriguez","orcid":"https://orcid.org/0000-0003-4679-2739"},"institutions":[{"id":"https://openalex.org/I136040515","display_name":"Universidad de Deusto","ror":"https://ror.org/00ne6sr39","country_code":"ES","type":"education","lineage":["https://openalex.org/I136040515"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Luis Rodriguez","raw_affiliation_strings":["Faculty of Engineering, University of Deusto, Bilbao, Spain","Fac. of Eng., Univ. of Deusto, Bilbao, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Engineering, University of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]},{"raw_affiliation_string":"Fac. of Eng., Univ. of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5028979857","display_name":"Pablo Ordu\u00f1a","orcid":"https://orcid.org/0000-0003-4024-3624"},"institutions":[{"id":"https://openalex.org/I136040515","display_name":"Universidad de Deusto","ror":"https://ror.org/00ne6sr39","country_code":"ES","type":"education","lineage":["https://openalex.org/I136040515"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pablo Orduna","raw_affiliation_strings":["Deusto Institute of Technology - DeustoTech, University of Deusto, Bilbao, Spain","[Deusto Institute of Technology-DeustoTech, University of Deusto, Bilbao, Spain]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Deusto Institute of Technology - DeustoTech, University of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]},{"raw_affiliation_string":"[Deusto Institute of Technology-DeustoTech, University of Deusto, Bilbao, Spain]","institution_ids":["https://openalex.org/I136040515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5004051982","display_name":"Olga Dziabenko","orcid":"https://orcid.org/0000-0002-8870-8163"},"institutions":[{"id":"https://openalex.org/I136040515","display_name":"Universidad de Deusto","ror":"https://ror.org/00ne6sr39","country_code":"ES","type":"education","lineage":["https://openalex.org/I136040515"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Olga Dziabenko","raw_affiliation_strings":["Deusto Institute of Technology - DeustoTech, University of Deusto, Bilbao, Spain","[Deusto Institute of Technology-DeustoTech, University of Deusto, Bilbao, Spain]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Deusto Institute of Technology - DeustoTech, University of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]},{"raw_affiliation_string":"[Deusto Institute of Technology-DeustoTech, University of Deusto, Bilbao, Spain]","institution_ids":["https://openalex.org/I136040515"]}]},{"author_position":"last","author":{"id":null,"display_name":"Maria Guenaga","orcid":null},"institutions":[{"id":"https://openalex.org/I136040515","display_name":"Universidad de Deusto","ror":"https://ror.org/00ne6sr39","country_code":"ES","type":"education","lineage":["https://openalex.org/I136040515"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Maria Guenaga","raw_affiliation_strings":["Deusto Institute of Technology - DeustoTech, University of Deusto, Bilbao, Spain","[Deusto Institute of Technology-DeustoTech, University of Deusto, Bilbao, Spain]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Deusto Institute of Technology - DeustoTech, University of Deusto, Bilbao, Spain","institution_ids":["https://openalex.org/I136040515"]},{"raw_affiliation_string":"[Deusto Institute of Technology-DeustoTech, University of Deusto, Bilbao, Spain]","institution_ids":["https://openalex.org/I136040515"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I136040515"],"apc_list":null,"apc_paid":null,"fwci":0.5449,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.57740879,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"174","last_page":"175"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7817531228065491},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.7723273038864136},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.7033556699752808},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.6766140460968018},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.566539466381073},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.501117467880249},{"id":"https://openalex.org/keywords/table","display_name":"Table (database)","score":0.5005090236663818},{"id":"https://openalex.org/keywords/design-cycle","display_name":"Design cycle","score":0.4340674579143524},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.35889333486557007},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3436914384365082},{"id":"https://openalex.org/keywords/multimedia","display_name":"Multimedia","score":0.341029554605484},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.32429665327072144},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2704651951789856},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26811009645462036},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.21369588375091553},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.1959395706653595},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.12266993522644043}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7817531228065491},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.7723273038864136},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.7033556699752808},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.6766140460968018},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.566539466381073},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.501117467880249},{"id":"https://openalex.org/C45235069","wikidata":"https://www.wikidata.org/wiki/Q278425","display_name":"Table (database)","level":2,"score":0.5005090236663818},{"id":"https://openalex.org/C2982740150","wikidata":"https://www.wikidata.org/wiki/Q5249230","display_name":"Design cycle","level":2,"score":0.4340674579143524},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.35889333486557007},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3436914384365082},{"id":"https://openalex.org/C49774154","wikidata":"https://www.wikidata.org/wiki/Q131765","display_name":"Multimedia","level":1,"score":0.341029554605484},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.32429665327072144},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2704651951789856},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26811009645462036},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.21369588375091553},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.1959395706653595},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.12266993522644043},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/expat.2013.6703060","is_oa":false,"landing_page_url":"https://doi.org/10.1109/expat.2013.6703060","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 2nd Experiment@ International Conference (exp.at'13)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/4","score":0.7300000190734863,"display_name":"Quality Education"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2130061034"],"related_works":["https://openalex.org/W2155289750","https://openalex.org/W2024574431","https://openalex.org/W2117300767","https://openalex.org/W2374017528","https://openalex.org/W4285503609","https://openalex.org/W2126248441","https://openalex.org/W4252661958","https://openalex.org/W2359999068","https://openalex.org/W2062086413","https://openalex.org/W2083648228"],"abstract_inverted_index":{"The":[0,45],"combination":[1],"of":[2],"Boole-Deusto":[3],"(software":[4],"tool":[5],"for":[6],"digital":[7,56,69],"electronics":[8,57],"design)":[9],"and":[10,16,61,67],"WebLab-Deusto-FPGA":[11],"(remote":[12],"lab)":[13],"allows":[14],"teachers":[15,62],"students":[17,60],"to":[18,38,58],"complete":[19],"the":[20,33,39],"full":[21],"design":[22],"cycle":[23],"in":[24,27,42,55],"a":[25,29,43,51],"computer":[26],"only":[28],"few":[30],"minutes:":[31],"from":[32],"truth":[34],"table":[35],"or":[36],"FSM":[37],"real":[40],"implementation":[41],"FPGA.":[44],"system":[46],"described":[47],"is":[48],"oriented":[49],"towards":[50],"first":[52],"year":[53],"course":[54],"help":[59],"when":[63],"they":[64],"are":[65],"learning":[66],"teaching":[68],"electronics.":[70]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}