{"id":"https://openalex.org/W2911878640","doi":"https://doi.org/10.1109/ewme.2018.8629486","title":"An HTML5-based Interactive Simulation Tool for Teaching and Self-Study of Electronic Circuits","display_name":"An HTML5-based Interactive Simulation Tool for Teaching and Self-Study of Electronic Circuits","publication_year":2018,"publication_date":"2018-09-01","ids":{"openalex":"https://openalex.org/W2911878640","doi":"https://doi.org/10.1109/ewme.2018.8629486","mag":"2911878640"},"language":"en","primary_location":{"id":"doi:10.1109/ewme.2018.8629486","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewme.2018.8629486","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 12th European Workshop on Microelectronics Education (EWME)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084589828","display_name":"Jan Haase","orcid":"https://orcid.org/0000-0003-3021-9217"},"institutions":[{"id":"https://openalex.org/I9341345","display_name":"University of L\u00fcbeck","ror":"https://ror.org/00t3r8h32","country_code":"DE","type":"education","lineage":["https://openalex.org/I9341345"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Jan Haase","raw_affiliation_strings":["Institute of Computer Engineering, University of L\u00fcbeck, L\u00fcbeck, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Engineering, University of L\u00fcbeck, L\u00fcbeck, Germany","institution_ids":["https://openalex.org/I9341345"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5084589828"],"corresponding_institution_ids":["https://openalex.org/I9341345"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.24229562,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"41","last_page":"44"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11283","display_name":"Experimental Learning in Engineering","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2214","display_name":"Media Technology"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13286","display_name":"Modeling and Simulation Systems","score":0.9589999914169312,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.935699999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7419847249984741},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.7105949521064758},{"id":"https://openalex.org/keywords/html5","display_name":"HTML5","score":0.6357566118240356},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.5948944091796875},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5381665229797363},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.49242839217185974},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4826000928878784},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.47431468963623047},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.46283817291259766},{"id":"https://openalex.org/keywords/resistor\u2013transistor-logic","display_name":"Resistor\u2013transistor logic","score":0.4613485634326935},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44667595624923706},{"id":"https://openalex.org/keywords/logic-simulation","display_name":"Logic simulation","score":0.44016796350479126},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.43788641691207886},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.43191269040107727},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3545450270175934},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3236783742904663},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.2459423542022705},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.21178242564201355},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.17640376091003418},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16289642453193665},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14462152123451233},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.0817858874797821}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7419847249984741},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.7105949521064758},{"id":"https://openalex.org/C84063617","wikidata":"https://www.wikidata.org/wiki/Q2053","display_name":"HTML5","level":2,"score":0.6357566118240356},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.5948944091796875},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5381665229797363},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.49242839217185974},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4826000928878784},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.47431468963623047},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.46283817291259766},{"id":"https://openalex.org/C180405849","wikidata":"https://www.wikidata.org/wiki/Q173464","display_name":"Resistor\u2013transistor logic","level":5,"score":0.4613485634326935},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44667595624923706},{"id":"https://openalex.org/C64859876","wikidata":"https://www.wikidata.org/wiki/Q173673","display_name":"Logic simulation","level":3,"score":0.44016796350479126},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.43788641691207886},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.43191269040107727},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3545450270175934},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3236783742904663},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.2459423542022705},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.21178242564201355},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.17640376091003418},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16289642453193665},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14462152123451233},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.0817858874797821},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewme.2018.8629486","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewme.2018.8629486","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 12th European Workshop on Microelectronics Education (EWME)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W2293697247"],"related_works":["https://openalex.org/W3129977055","https://openalex.org/W4387905179","https://openalex.org/W2519443189","https://openalex.org/W2386022279","https://openalex.org/W2051956260","https://openalex.org/W2152533674","https://openalex.org/W4243936066","https://openalex.org/W4236027727","https://openalex.org/W4235101055","https://openalex.org/W4387767018"],"abstract_inverted_index":{"Logic":[0],"Circuits":[1],"is":[2,15],"a":[3,28,44],"tool":[4],"for":[5],"teaching":[6],"or":[7],"self-study":[8],"of":[9,46],"circuits":[10],"in":[11,27],"computer":[12],"engineering.":[13],"It":[14],"HTML5-based":[16],"and":[17,24,37,43],"thus":[18],"runs":[19],"on":[20],"all":[21],"current":[22],"platforms":[23],"operating":[25],"systems":[26],"browser.":[29],"Its":[30],"features":[31],"include":[32],"simple":[33],"logic":[34,39],"gates,":[35],"combinatorial":[36],"sequential":[38],"circuits,":[40],"4-valued":[41],"logic,":[42],"VHDL-export":[45],"modeled":[47],"circuits.":[48]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
