{"id":"https://openalex.org/W2040962529","doi":"https://doi.org/10.1109/ewme.2014.6877410","title":"Wide parameterization of FPGA projects: Educational and research aspects","display_name":"Wide parameterization of FPGA projects: Educational and research aspects","publication_year":2014,"publication_date":"2014-05-01","ids":{"openalex":"https://openalex.org/W2040962529","doi":"https://doi.org/10.1109/ewme.2014.6877410","mag":"2040962529"},"language":"en","primary_location":{"id":"doi:10.1109/ewme.2014.6877410","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewme.2014.6877410","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th European Workshop on Microelectronics Education (EWME)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085041589","display_name":"Artem Perepelitsyn","orcid":"https://orcid.org/0000-0002-5463-7889"},"institutions":[{"id":"https://openalex.org/I23686167","display_name":"National Aerospace University \u2013 Kharkiv Aviation Institute","ror":"https://ror.org/048j5n646","country_code":"UA","type":"education","lineage":["https://openalex.org/I23686167"]}],"countries":["UA"],"is_corresponding":true,"raw_author_name":"Artem Perepelitsyn","raw_affiliation_strings":["Department of Computer Systems and Networks, National Aerospace University \u201cKhAI\u201d, Chkalov str. 17, 61070 Kharkiv, Ukraine","Department of Computer Systems and Networks, National Aerospace University \"KhAI\", Chkalov str. 17, 61070 Kharkiv, Ukraine"],"affiliations":[{"raw_affiliation_string":"Department of Computer Systems and Networks, National Aerospace University \u201cKhAI\u201d, Chkalov str. 17, 61070 Kharkiv, Ukraine","institution_ids":["https://openalex.org/I23686167"]},{"raw_affiliation_string":"Department of Computer Systems and Networks, National Aerospace University \"KhAI\", Chkalov str. 17, 61070 Kharkiv, Ukraine","institution_ids":["https://openalex.org/I23686167"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055702099","display_name":"Vitaliy Kulanov","orcid":"https://orcid.org/0000-0002-9312-0735"},"institutions":[{"id":"https://openalex.org/I23686167","display_name":"National Aerospace University \u2013 Kharkiv Aviation Institute","ror":"https://ror.org/048j5n646","country_code":"UA","type":"education","lineage":["https://openalex.org/I23686167"]}],"countries":["UA"],"is_corresponding":false,"raw_author_name":"Vitaliy Kulanov","raw_affiliation_strings":["Department a/Computer Systems and Networks","National Aerospace University \u201cKhAI\u201d, Kharkiv, Ukraine","National Aerospace University \"KhAI\", Kharkiv, Ukraine"],"affiliations":[{"raw_affiliation_string":"Department a/Computer Systems and Networks","institution_ids":[]},{"raw_affiliation_string":"National Aerospace University \u201cKhAI\u201d, Kharkiv, Ukraine","institution_ids":["https://openalex.org/I23686167"]},{"raw_affiliation_string":"National Aerospace University \"KhAI\", Kharkiv, Ukraine","institution_ids":["https://openalex.org/I23686167"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5085041589"],"corresponding_institution_ids":["https://openalex.org/I23686167"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.1040447,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"124","last_page":"126"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9653000235557556,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9648000001907349,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.9200290441513062},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8846125602722168},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7463526129722595},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6183366775512695},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.5943558216094971},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5672175884246826},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4120499789714813},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.23768770694732666},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.086829274892807}],"concepts":[{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.9200290441513062},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8846125602722168},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7463526129722595},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6183366775512695},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.5943558216094971},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5672175884246826},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4120499789714813},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.23768770694732666},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.086829274892807},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewme.2014.6877410","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewme.2014.6877410","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th European Workshop on Microelectronics Education (EWME)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":1,"referenced_works":["https://openalex.org/W1559343931"],"related_works":["https://openalex.org/W2107680156","https://openalex.org/W2964213236","https://openalex.org/W2163719598","https://openalex.org/W3161919736","https://openalex.org/W2387018512","https://openalex.org/W4301184752","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W2038503502"],"abstract_inverted_index":{"The":[0],"techniques":[1],"for":[2,40],"FPGA-based":[3],"projects":[4],"parameterization":[5,20],"and":[6,30],"resource":[7,32],"evaluation":[8],"are":[9,34],"proposed.":[10],"Case":[11],"study":[12],"of":[13,38],"flexible":[14,44],"Reed-Solomon":[15,27],"codec":[16,28],"architecture":[17,45],"with":[18,43],"proposed":[19,41],"technique":[21],"is":[22,46],"presented.":[23],"Dependencies":[24],"between":[25],"different":[26],"parameters":[29],"FPGA":[31],"utilization":[33],"analyzed.":[35],"Different":[36],"areas":[37],"application":[39],"RS-codec":[42],"discussed.":[47]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}