{"id":"https://openalex.org/W4407693557","doi":"https://doi.org/10.1109/ewdts63723.2024.10873634","title":"Configurable DRAM Access for Neural Network Accelerators: A SystemC Virtual Platform Approach","display_name":"Configurable DRAM Access for Neural Network Accelerators: A SystemC Virtual Platform Approach","publication_year":2024,"publication_date":"2024-11-13","ids":{"openalex":"https://openalex.org/W4407693557","doi":"https://doi.org/10.1109/ewdts63723.2024.10873634"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts63723.2024.10873634","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts63723.2024.10873634","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE East-West Design &amp;amp; Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5116309698","display_name":"Tina Hashemi","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Tina Hashemi","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090498703","display_name":"Rezgar Sadeghi","orcid":"https://orcid.org/0000-0003-0802-1474"},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Rezgar Sadeghi","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025400374","display_name":"Maryam Rajabalipanah","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Maryam Rajabalipanah","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065336089","display_name":"Zahra Hojati","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Zahra Hojati","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran","institution_ids":["https://openalex.org/I23946033"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5007933406","display_name":"Zainalabedin Navabi","orcid":null},"institutions":[{"id":"https://openalex.org/I23946033","display_name":"University of Tehran","ror":"https://ror.org/05vf56z40","country_code":"IR","type":"education","lineage":["https://openalex.org/I23946033"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Zainalabedin Navabi","raw_affiliation_strings":["School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, College of Engineering, University of Tehran,Tehran,Iran","institution_ids":["https://openalex.org/I23946033"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I23946033"],"apc_list":null,"apc_paid":null,"fwci":0.9271,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.7645413,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.9138652086257935},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8963615894317627},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7947657108306885},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6085845232009888},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5349513292312622},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19113534688949585}],"concepts":[{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.9138652086257935},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8963615894317627},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7947657108306885},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6085845232009888},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5349513292312622},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19113534688949585}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts63723.2024.10873634","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts63723.2024.10873634","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE East-West Design &amp;amp; Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":16,"referenced_works":["https://openalex.org/W2094756095","https://openalex.org/W2129991978","https://openalex.org/W2604319603","https://openalex.org/W2798317693","https://openalex.org/W2963363373","https://openalex.org/W2979754840","https://openalex.org/W3038988173","https://openalex.org/W3047599609","https://openalex.org/W3135765046","https://openalex.org/W3209875679","https://openalex.org/W4200376271","https://openalex.org/W4240168186","https://openalex.org/W4293118024","https://openalex.org/W4293149165","https://openalex.org/W4300171661","https://openalex.org/W4387007199"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2301151507","https://openalex.org/W1885396597","https://openalex.org/W2105092668","https://openalex.org/W1550409889","https://openalex.org/W1830510111","https://openalex.org/W2039065447","https://openalex.org/W2208074837"],"abstract_inverted_index":{"With":[0],"the":[1,19,29,69,111,128,136,163,166,169,177,201,216,224,229],"advancement":[2],"of":[3,8,21,32,42,53,72,91,120,132,138,233],"integration":[4],"technology,":[5],"placing":[6],"billions":[7],"transistors":[9,22],"in":[10,18,28,51,116,148,223],"embedded":[11],"systems":[12],"has":[13,23,46],"become":[14],"possible.":[15],"This":[16,62,104,154],"increase":[17],"number":[20,137],"led":[24],"to":[25,49,59,113,123,186,194,200,215,241],"a":[26,82,117,157],"rise":[27],"processing":[30,43,60,100],"power":[31],"these":[33],"systems.":[34,61],"However,":[35],"memory":[36,48,70,235],"manufacturing":[37],"technology":[38],"differs":[39],"from":[40],"that":[41,86,176],"systems,":[44],"which":[45],"caused":[47],"lag":[50],"terms":[52],"latency":[54],"and":[55,95,134,168,188,218,231,243],"energy":[56],"consumption":[57],"compared":[58,199],"paper":[63],"proposes":[64],"an":[65],"approach":[66],"for":[67,99,150],"optimizing":[68],"accesses":[71],"deep":[73],"neural":[74,101],"network":[75,102],"accelerators.":[76],"In":[77],"this":[78],"regard,":[79],"we":[80],"propose":[81],"flexible":[83],"hardware":[84,112,179],"solution":[85],"can":[87],"access":[88,182,190,236],"various":[89,210],"types":[90],"1D,":[92],"2D,":[93],"3D,":[94],"4D":[96],"data":[97,220,227],"required":[98],"layers.":[103],"versatility":[105],"is":[106,146],"significant":[107],"as":[108],"it":[109],"allows":[110],"be":[114],"used":[115],"wide":[118],"range":[119],"applications,":[121],"contributing":[122],"performance":[124],"optimization":[125],"by":[126,184,192,239],"calculating":[127],"optimized":[129],"burst":[130],"length":[131],"DRAM":[133,140,181],"reducing":[135],"off-chip":[139,234],"accesses.":[141],"A":[142],"customized":[143],"virtual":[144],"platform":[145,155],"developed":[147],"SystemC":[149],"design":[151],"space":[152],"exploration.":[153],"builds":[156],"complete":[158],"system":[159],"model,":[160],"including":[161],"DRAM,":[162],"proposed":[164,178],"hardware,":[165],"accelerator,":[167],"RISC-V":[170],"processor.":[171],"Our":[172],"simulation":[173],"results":[174,206],"show":[175],"reduces":[180],"volume":[183,230],"up":[185,193,240],"16%":[187],"decreases":[189],"time":[191,232],"56%.":[195],"These":[196],"improvements":[197],"are":[198,207,237],"state-of-the-art":[202],"SmartShuttle":[203],"technique.":[204],"The":[205],"conducted":[208],"across":[209],"layers":[211],"with":[212],"partitions":[213],"similar":[214],"SmartShuttle,":[217],"weight-stationary":[219],"flow.":[221],"Additionally,":[222],"input":[225],"stationary":[226],"flow,":[228],"reduced":[238],"12%":[242],"73%,":[244],"respectively.":[245]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
