{"id":"https://openalex.org/W2571427637","doi":"https://doi.org/10.1109/ewdts.2016.7807656","title":"Secure scan-based design using Blum Blum Shub algorithm","display_name":"Secure scan-based design using Blum Blum Shub algorithm","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2571427637","doi":"https://doi.org/10.1109/ewdts.2016.7807656","mag":"2571427637"},"language":"en","primary_location":{"id":"doi:10.1109/ewdts.2016.7807656","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2016.7807656","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068702213","display_name":"Elnaz Koopahi","orcid":"https://orcid.org/0000-0002-3053-2011"},"institutions":[{"id":"https://openalex.org/I39268498","display_name":"University of Isfahan","ror":"https://ror.org/05h9t7759","country_code":"IR","type":"education","lineage":["https://openalex.org/I39268498"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Elnaz Koopahi","raw_affiliation_strings":["Faculty of Computer Engineering, University of Isfahan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Computer Engineering, University of Isfahan","institution_ids":["https://openalex.org/I39268498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005532865","display_name":"Shahram Etemadi Borujeni","orcid":"https://orcid.org/0000-0002-0959-3952"},"institutions":[{"id":"https://openalex.org/I39268498","display_name":"University of Isfahan","ror":"https://ror.org/05h9t7759","country_code":"IR","type":"education","lineage":["https://openalex.org/I39268498"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Shahram Etemadi Borujeni","raw_affiliation_strings":["Faculty of Computer Engineering, University of Isfahan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Faculty of Computer Engineering, University of Isfahan","institution_ids":["https://openalex.org/I39268498"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I39268498"],"apc_list":null,"apc_paid":null,"fwci":0.6723,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.64141315,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":"800","issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7582365870475769},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6583154201507568},{"id":"https://openalex.org/keywords/nist","display_name":"NIST","score":0.5784879326820374},{"id":"https://openalex.org/keywords/observability","display_name":"Observability","score":0.5690120458602905},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5147519111633301},{"id":"https://openalex.org/keywords/controllability","display_name":"Controllability","score":0.5125174522399902},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5121209621429443},{"id":"https://openalex.org/keywords/vulnerability","display_name":"Vulnerability (computing)","score":0.5013399124145508},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.47546666860580444},{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.46433722972869873},{"id":"https://openalex.org/keywords/smart-card","display_name":"Smart card","score":0.43518292903900146},{"id":"https://openalex.org/keywords/hash-function","display_name":"Hash function","score":0.4277493953704834},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.4197508692741394},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.39985328912734985},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33333620429039},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.27519991993904114},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.11632442474365234},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1059449315071106}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7582365870475769},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6583154201507568},{"id":"https://openalex.org/C111219384","wikidata":"https://www.wikidata.org/wiki/Q6954384","display_name":"NIST","level":2,"score":0.5784879326820374},{"id":"https://openalex.org/C36299963","wikidata":"https://www.wikidata.org/wiki/Q1369844","display_name":"Observability","level":2,"score":0.5690120458602905},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5147519111633301},{"id":"https://openalex.org/C48209547","wikidata":"https://www.wikidata.org/wiki/Q1331104","display_name":"Controllability","level":2,"score":0.5125174522399902},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5121209621429443},{"id":"https://openalex.org/C95713431","wikidata":"https://www.wikidata.org/wiki/Q631425","display_name":"Vulnerability (computing)","level":2,"score":0.5013399124145508},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.47546666860580444},{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.46433722972869873},{"id":"https://openalex.org/C110406131","wikidata":"https://www.wikidata.org/wiki/Q41349","display_name":"Smart card","level":2,"score":0.43518292903900146},{"id":"https://openalex.org/C99138194","wikidata":"https://www.wikidata.org/wiki/Q183427","display_name":"Hash function","level":2,"score":0.4277493953704834},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.4197508692741394},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.39985328912734985},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33333620429039},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.27519991993904114},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.11632442474365234},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1059449315071106},{"id":"https://openalex.org/C28826006","wikidata":"https://www.wikidata.org/wiki/Q33521","display_name":"Applied mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C204321447","wikidata":"https://www.wikidata.org/wiki/Q30642","display_name":"Natural language processing","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/ewdts.2016.7807656","is_oa":false,"landing_page_url":"https://doi.org/10.1109/ewdts.2016.7807656","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE East-West Design & Test Symposium (EWDTS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1517403092","https://openalex.org/W1563937974","https://openalex.org/W1660562555","https://openalex.org/W2010903499","https://openalex.org/W2052912197","https://openalex.org/W2085759780","https://openalex.org/W2085992264","https://openalex.org/W2103468612","https://openalex.org/W2124928244","https://openalex.org/W2125846166","https://openalex.org/W2130364905","https://openalex.org/W6636975353","https://openalex.org/W6825343983"],"related_works":["https://openalex.org/W2157191248","https://openalex.org/W2107525390","https://openalex.org/W2114184981","https://openalex.org/W290234012","https://openalex.org/W1998206633","https://openalex.org/W2150046587","https://openalex.org/W2164493372","https://openalex.org/W2153086993","https://openalex.org/W2114980936","https://openalex.org/W4249526199"],"abstract_inverted_index":{"Scan":[0],"design":[1,46],"is":[2,48],"a":[3,28,36,44,70],"powerful":[4],"Design-for-Testability":[5],"(DFT)":[6],"technique":[7],"that":[8],"enhances":[9],"controllability":[10],"and":[11,60],"observability":[12],"of":[13,16,35,96],"internal":[14],"nodes":[15],"the":[17,97],"circuit":[18],"under":[19],"test.":[20],"However,":[21],"it":[22],"can":[23,76],"increase":[24],"system":[25,75],"vulnerability":[26],"being":[27],"back":[29],"door":[30],"to":[31,68,79,89],"access":[32,88],"secret":[33],"information":[34],"secure":[37,58],"chip.":[38],"In":[39],"this":[40],"paper,":[41],"we":[42],"present":[43],"scan-based":[45,51],"which":[47],"robust":[49],"against":[50],"side":[52],"channel":[53],"attacks.":[54],"We":[55],"use":[56],"SHA256":[57],"hash":[59],"Blum":[61,62],"Shub":[63],"pseudo":[64],"random":[65],"number":[66],"generator":[67],"create":[69],"simple":[71],"challenge/response":[72],"scheme.":[73],"The":[74,94],"be":[77],"used":[78],"enable":[80],"JTAG":[81],"instructions":[82],"for":[83],"authorized":[84],"user":[85],"or":[86],"control":[87],"IEEE":[90],"1687":[91],"on-chip":[92],"instruments.":[93],"effectiveness":[95],"proposed":[98],"method":[99],"has":[100],"been":[101],"verified":[102],"using":[103],"NIST":[104],"statistical":[105],"test":[106],"suite.":[107]},"counts_by_year":[{"year":2021,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}